ICS8308AGILF IDT, Integrated Device Technology Inc, ICS8308AGILF Datasheet - Page 11

• Manufacturer Part Number: ICS8308AGILF
• Description: IC CLK BUFFER 1:8 350MHZ 24TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8308AGILF

• Number Of Circuits: 1
• Ratio - Input:output: 2:8
• Differential - Input:output: Yes/No
• Input: HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 350MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Frequency-max: 350MHz
• Number Of Clock Inputs: 2
• Output Frequency: 350MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8308AGILF

ICS8308I Data Sheet
F
F
ICS8308AGI REVISION C MARCH 23, 2011
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both differential signals must meet
the V
examples for the CLK/nCLK input driven by the most common
driver types. The input interfaces suggested here are examples
F
IGURE
IGURE
IGURE
IFFERENTIAL
3.3V
R5,R6 locate near the driver pin.
PP
3.3V
and V
LVPECL
2C. CLK/nCLK I
2A. CLK/nCLK I
2E. CLK/nCLK I
1.8V
LVPECL
R5
100 - 200
CMR
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
IDT’
3.3V LVPECL D
input requirements. Figures 2A to 2E show interface
C
S
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
R6
100 - 200
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL D
Zo = 50 Ohm
Zo = 50 Ohm
I
NPUT
NPUT
NPUT
NPUT
RIVER
RIVER WITH
R1
50
3.3V
R3
125
D
C1
C2
D
D
I
RIVER
R1
84
NTERFACE
RIVEN BY
RIVEN BY
RIVEN BY
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
R4
125
CLK
nCLK
AC C
R2
84
CLK
nCLK
3.3V
3.3V
HiPerClockS
Input
OUPLE
HiPerClockS
Input
CLK
nCLK
3.3V
HiPerClockS
Input
11
LOW SKEW, 1-TO-8 DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
only. Please consult with the vendor of the driver component to
confirm the driver termination requirements. For example in Figure
2A, the input termination applies for IDT LVHSTL drivers. If you
are using an LVHSTL driver from another vendor, use their
termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
2D. CLK/nCLK I
2B. CLK/nCLK I
LVDS_Driv er
LVPECL
3.3V LVPECL D
3.3V LVDS D
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
RIVER
R3
50
D
D
RIVEN BY
RIVEN BY
2011 Integrated Device Technology, Inc.
R2
50
R1
100
CLK
nCLK
3.3V
HiPerClockS
Input
CLK
nCLK
3.3V
Receiv er