ICS8535AGI-21LFT IDT, Integrated Device Technology Inc, ICS8535AGI-21LFT Datasheet
ICS8535AGI-21LFT
Specifications of ICS8535AGI-21LFT
Related parts for ICS8535AGI-21LFT
ICS8535AGI-21LFT Summary of contents
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... Available in lead-free (RoHS 6) package Pin Assignment V EE CLK_EN CLK_SEL CLK0 nQ0 CLK1 nQ1 14 Lead TSSOP 4.40mm x 5.0mm x 0.925mm package body 1 ICS8535I- nQ0 nQ1 ICS8535I-21 G Package Top View ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ...
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... When LOW, selects CLK0 input. LVCMOS/LVTTL interface levels. Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels. Power supply pins. Differential output pair. LVPECL interface levels. No connect. Differential output pair. LVPECL interface levels. Test Conditions 2 Minimum Typical Maximum ICS8535AGI-21 REV. A NOVEMBER 24, 2008 Units pF Ω k Ω k ...
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... LOW 1 HIGH IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER Selected Source Q0, Q1 CLK0 Disabled; Low CLK1 Disabled; Low CLK0 Enabled CLK1 Enabled nQ0, nQ1 HIGH LOW 3 Outputs nQ0, nQ1 Disabled; High Disabled; High Enabled Enabled Enabled ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ...
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... Test Conditions Minimum 3.135 = 3.3V ± 5 -40°C to 85° Test Conditions Minimum 3.465 3.465 3.465V 3.465V Typical Maximum 3.3 3.465 50 Typical Maximum 0.3 CC -0.3 1.3 -0.3 0.8 150 5 -5 -150 ICS8535AGI-21 REV. A NOVEMBER 24, 2008 Units V mA Units µA µA µA µA ...
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... Integration Range: 12kHz – 20MHz 20% to 80% @ 50MHz ƒ ≤ 200MHz 5 Minimum Typical Maximum V – 1.4 V – 0 – 2.0 V – 1 0.6 1.0 Minimum Typical Maximum 266 1.0 1.6 0.03 20 300 300 600 45 55 ICS8535AGI-21 REV. A NOVEMBER 24, 2008 Units µA µA V Units MHz ...
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... Offset Frequency (Hz) device. This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependent on the input source and measurement equipment 10M ICS8535AGI-21 REV. A NOVEMBER 24, 2008 100M ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER Par t 1 nQx SCOPE Qx Qx Par t 2 nQy Qy nQx Part-to-Part Skew CLK0, CLK1 nQ0, nQ1 Q0, Q1 Propagation Delay nQ0, nQ1 Output Duty Cycle/Pulse Width/Period 7 tsk(pp PERIOD t PW odc = x 100% t PERIOD ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ...
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... FIN 50Ω RTT Figure 2B. 3.3V LVPECL Output Termination 8 3.3V 125Ω 125Ω 50Ω o FOUT Z = 50Ω o 84Ω 84Ω ICS8535AGI-21 REV. A NOVEMBER 24, 2008 FIN ...
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... C2 C3 .1uF .1uF 10uf Figure 3. ICS8535I-21 LVPECL Buffer Schematic Example IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER pin. For ICS8535I-21, the unused clock outputs can be left floating. (U1-14) C4 .1uF Vcco = 3. 133 133 82.5 82.5 Optional Termination ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ...
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... Multi-Layer PCB, JEDEC Standard Test Boards IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER = 3. 3.465V, which gives worst case results 3.465V * 50mA = 173.25mW EE_MAX * Pd_total + θ vs. Air Flow JA 0 103.8°C/W 10 must be used. Assuming no air flow JA 1 2.5 99.6°C/W 97.3°C/W ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER V OUT RL 50Ω – 0.9V CC_MAX = V – 1.7V CC_MAX ] * (V – [(2V – CC_MAX OH_MAX ] * (V – [(2V – CC_MAX OL_MAX CC_MAX 11 – V ))/ – V CC_MAX OH_MAX L CC_MAX – V ))/ – V OL_MAX L CC_MAX ICS8535AGI-21 REV. A NOVEMBER 24, 2008 ) = OH_MAX ) = OL_MAX ...
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... All Dimensions in Millimeters Symbol Minimum 0.5 A2 0.80 b 0.19 c 0. 0.45 α 0° aaa Reference Document: JEDEC Publication 95, MO-153 12 ICS8535AGI-21 REV. A NOVEMBER 24, 2008 2.5 97.3°C/W Maximum 14 1.20 0.15 1.05 0.30 0.20 5.10 6.40 Basic 4.50 0.65 Basic 0.75 8° 0.10 ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER Package Shipping Packaging “Lead-Free” 14 Lead TSSOP “Lead-Free” 14Lead TSSOP 2500 Tape & Reel 13 ICS8535AGI-21 REV. A NOVEMBER 24, 2008 Temperature Tube -40°C to 85°C -40°C to 85°C ...
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ICS8535I-21 LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER Contact Information: www.IDT.com Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the ...