ICS8533AGI-01LF IDT, Integrated Device Technology Inc, ICS8533AGI-01LF Datasheet - Page 11

• Manufacturer Part Number: ICS8533AGI-01LF
• Description: IC FANOUT BUFFER 1-4 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8533AGI-01LF

• Number Of Circuits: 1
• Ratio - Input:output: 2:4
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8533AGI-01LF

The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50 transmission lines. Matched impedance techniques
8533AGI-01
T
ERMINATION FOR
RTT =
F
((V
IGURE
FOUT
OH
+ V
OL
5A. LVPECL O
) / (V
1
LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
UTPUTS
T
RTT
ERMINATION
50
V
CC
FIN
- 2V
D
IFFERENTIAL
11
should be used to maximize operating frequency and mini-
mize signal distortion. Figures 5A and 5B show two different
layouts which are recommended only as guidelines. Other
suitable clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compatibility
across all printed circuit and clock component process varia-
tions.
FOUT
F
-
IGURE
TO
-3.3V LVPECL F
5B. LVPECL O
Z
Z
o
o
= 50
= 50
125
84
UTPUT
ICS8533I-01
L
OW
3.3V
T
125
84
ANOUT
S
ERMINATION
REV. A DECEMBER 6, 2007
KEW
FIN
, 1-
B
UFFER
TO
-4