MPC9446AC Freescale Semiconductor, MPC9446AC Datasheet - Page 5

• Manufacturer Part Number: MPC9446AC
• Description: IC CLOCK FANOUT BUFFER 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of MPC9446AC

• Number Of Circuits: 1
• Ratio - Input:output: 2:10
• Differential - Input:output: No/No
• Input: LVCMOS
• Output: LVCMOS
• Frequency - Max: 250MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 250MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Advanced Clock Drivers Devices
Freescale Semiconductor
Table 8. DC Characteristics (V
Table 9. AC Characteristics (V
Table 10. AC Characteristics (V
Symbol
1. The MPC9446 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated
2. Input pull-up / pull-down resistors influence input current.
3. I
Symbol
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. The MPC9446 is functional up to an input and output clock frequency of 350 MHz and is characterized up to 250 MHz.
3. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input
4. Output pulse skew t
Symbol
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. For all other AC specifications, refer to 2.5 V or 3.3 V tables according to the supply voltage of the output bank.
3. Output pulse skew t
t
t
I
t
t
PLZ, HZ
t
t
PZL, LZ
PLH,HL
CCQ
t
t
Z
P, REF
t
t
sk(PP)
DC
sk(PP)
DC
f
V
t
t
SK(P)
SK(P)
V
t
sk(O)
t
sk(O)
V
MAX
V
f
PLH
PHL
OUT
I
r
r
transmission line to a termination voltage of V
output.
pulse width, output duty cycle and maximum frequency specifications.
dependent: DC
dependent: DC
ref
OH
OL
IN
CCQ
, t
, t
IH
IL
Q
Q
(3)
f
f
is the DC current consumption of the device with all outputs open and the input in its default state or open.
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output Impedance
Input Current
Maximum Quiescent Supply Current
Input Frequency
Maximum Output Frequency
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Propagation Delay
Output Disable Time
Output Enable Time
Output-to-Output Skew
Device-to-Device Skew
Output Pulse Skew
Output Duty Cycle
Output Rise/Fall Time
Output-to-Output Skew
Device-to-Device Skew
Propagation Delay
Output Pulse Skew
Output Duty Cycle
Q
Q
= (0.5 ± t
= (0.5 ± t
Any output bank, same output divider
Any output bank, same output divider
SK(P)
SK(P)
(2)
Characteristics
Characteristics
Characteristics
is the absolute difference of the propagation delay times: | t
is the absolute difference of the propagation delay times: | t
Any output, Any output divider
Any output, Any output divider
(4)
SK(P)
(3)
SK(P)
CC
CC
•
•
CC
f
f
OUT
OUT
= V
= V
= 3.3 V + 5%, V
CCLK0,1 to any Q
CCLK0,1 to any Q
CCLK0,1 to any Q
). For example at f
).
CCA
CCA
Within one bank
Within one bank
÷1 or ÷2 output
÷1 or ÷2 output
= V
= V
TT
÷1 output
÷2 output
. Alternatively, the device drives up to two 50 Ω series terminated transmission lines per
CCB
CCB
= V
= V
CCA
OUT
CCC
CCC
, V
= 125 MHz the output duty cycle limit is 50% ± 2.5%.
CCB
= 2.5 V ± 5%, T
= 2.5 V ± 5%, T
–0.3
Min
Min
Min
1.7
1.8
1.4
2.6
2.6
0.1
45
45
0
0
0
, V
TT
TT
CCC
.
.
= 2.5 V + 5% or 3.3 V + 5%, T
17 – 20
See 3.3 V Table
Typ
Typ
Typ
50
50
A
A
= –40°C to +85°C)
= –40°C to +85°C)
(2)
PLH
PLH
– t
– t
V
CC
PHL
PHL
250
250
±200
1.0
Max
Max
Max
125
150
200
350
200
150
250
350
250
0.7
0.6
2.0
5.6
5.5
3.0
1.0
2.5
10
10
55
55
+ 0.3
(3)
(2)
(2)
|. Output duty cycle is frequency
|. Output duty cycle is frequency
(1)
Unit
Unit
MHz
MHz
MHz
Unit
mA
µA
ns
ns
ns
ns
ns
ns
ps
ps
ps
ns
ps
ns
ps
ps
ps
ns
ps
%
%
Ω
V
V
V
V
A
= –40°C to +85°C)
LVCMOS
LVCMOS
I
I
V
All V
FSELx = 0
FSELx = 1
0.7 to 1.7 V
DC
0.6 to 1.8 V
DC
OH
OL
IN
REF
REF
= 15 mA
= GND or V
= –15 mA
CC
= 50%
= 50%
Pins
Condition
Condition
Condition
(1)
IN
MPC9446
= V
(1) (2)
CC
5