SKY72302-21 Skyworks Solutions Inc, SKY72302-21 Datasheet - Page 12

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SKY72302-21

Manufacturer Part Number
SKY72302-21
Description
IC SYNTHESIZER 6.1GHZ 28-EPTSSOP
Manufacturer
Skyworks Solutions Inc
Type
Fractional N Synthesizerr
Datasheet

Specifications of SKY72302-21

Pll
Yes
Input
Clock, Crystal
Output
Clock, Crystal
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
6.1GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Frequency-max
6.1GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
863-1079-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SKY72302-21
Manufacturer:
SKYWORKS/思佳讯
Quantity:
20 000
DATA SHEET • SKY72302-21 FREQUENCY SYNTHESIZER
The Phase Detector/Charge Pump Control Register allows control
of the gain for both phase detectors and configuration of the
LD/PSmain and LD/PSaux signals for frequency power steering or
lock detection. As shown in Figure 12, the values to be loaded
are:
12
Main Phase Detector Gain = Five-bit value for programmable
main phase detector gain. Range is from 0 to 31 decimal for
31.25 to 1000 A/2 radian, respectively.
Main Power Steering Enable = One-bit flag to enable the
frequency power steering circuitry of the main phase detector.
When this bit is cleared, the LD/PSmain pin is configured to be
a lock detect, active-low, open collector pin. When this bit is
set, the LD/PSmain pin is configured to be a frequency power
steering pin and can be used to bypass the external main loop
filter to provide faster frequency acquisition.
Auxiliary Phase Detector Gain = Five-bit value for
programmable auxiliary phase detector gain. Range is from 0 to
31 decimal for 31.25 to 1000 A/2 radian, respectively.
Auxiliary Power Steering Enable = One-bit flag to enable the
frequency power steering circuitry of the auxiliary phase
detector. When this bit is cleared, the LD/PSaux pin is
configured to be a lock detect, active-low, open collector pin.
When this bit is set, the LD/PSaux pin is configured to be a
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
September 9, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 101216L
A3
A3
0
0
A2
A2
1
1
A1
A1
0
1
A0
A0
1
0
Figure 12. Phase Detector/Charge Pump Control Register (Write Only)
11
11
X
Figure 11. Reference Frequency Dividers Register (Write Only)
10
10
X
9
9
8
8
7
7
6
6
5
5
4
4
3
3
The Power Down/Multiplexer Output Select Control Register
allows control of the power-down modes, internal multiplexer
output, and main
Figure 13, the values to be loaded are:
frequency power steering pin and may be used to bypass the
external auxiliary loop filter to provide faster frequency
acquisition.
Full Power Down = One-bit flag that powers down the
SKY72302-21 except for the reference oscillator and the serial
interface. When this bit is cleared, the SKY72302-21 is powered
up. When this bit is set, the SKY72302-21 is in full power-down
mode excluding the Mux_out signal (pin 3).
Main Synthesizer Power Down = One-bit flag to power down
the main synthesizer. When this bit is cleared, the main
synthesizer is powered up. When this bit is set, the main
synthesizer is in power-down mode.
Main Synthesizer Mode = One-bit flag to power down the main
synthesizer’s
integer-N synthesizer. When this bit is cleared, the main
synthesizer is in fractional-N mode. When this bit is set, the
main synthesizer is in integer-N mode.
2
2
1
1
Main Reference Frequency Divider Index
Auxiliary Reference Frequency Divider Index
Main Phase Detector Gain
Main Power Steering/Lock Detect Enable
Auxiliary Phase Detector Gain
Auxiliary Power Steering/Lock Detect Enable
0
0
modulator and fractional unit to operate as an
synthesizer fractionality. As shown in
C1422
C1423

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