IDT5T940-30NLGI IDT, Integrated Device Technology Inc, IDT5T940-30NLGI Datasheet - Page 7

• Manufacturer Part Number: IDT5T940-30NLGI
• Description: IC CLK GENERATOR PREC 28-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr

Specifications of IDT5T940-30NLGI

• Input: LVDS, LVPECL, LVTTL
• Output: LVPECL
• Frequency - Max: 666.52MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN
• Frequency-max: 666.52MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 5T940-30NLGI; 800-1987; IDT5T940-30NLGI

INPUT TIMING REQUIREMENTS
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (OC-192)
NOTE:
1. All input frequencies and PLLBW
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR LVDS
NOTE:
1. Not to exceed V
IDT5T940
PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
LOCK
Symbol
CLKIN
Symbol
Symbol
Input Characteristics
Output Characteristics
REF
PLLBW
CLKIN
t
F
V
REF
JIT
Q
Q
V
∆V
∆V
F
t
V
I
V
V
CLKIN
DUTY
I
OT(+)
OSD
t
OT(-)
t
I
REF
(
OUT
REG
OS
AQ
t
t
SK
t
DIF
t
IN
CM
OS
R
P
TOL
F
J
OT
OS
TOL
H
TOL
)
H
DD
Parameter
Input Reference Clock Duty Cycle
Input Reference Clock Range
Input Reference Clock Frequency Tolerance
Clock in Frequency Range
Clock in Duty Cycle
Acquisition Time from Return of Valid CLKIN
Frequency Tolerance for LOCK
Tolerance to Input Jitter
Parameter
Multiplied Clock Output Frequency
Regenerated Clock Output Frequency
Input Clock Frequency
Output Rise Time
Output Fall Time
Skew between Q
PLL Bandwidth Setting
Jitter Transfer Peaking
Jitter Generation
(with 50KHz to 80MHz band pass filter)
Output Duty Cycle
Parameter
Input Current (CLKIN, REFIN)
Common Mode Input Voltage Range
Differential Voltage Required to Toggle Input
Differential Output Voltage for the TRUE Binary State
Differential Output Voltage for the FALSE Binary State
Change in V
Output Common Mode Voltage (Offset Voltage)
Change in V
Outputs Short Circuit Current
Differential Outputs Short Circuit Current
- 0.05V.
OT
OS
Between Complementary Output States
Between Complementary Output States
(1)
[1:0]
OUT
permitted by PLL Bandwidth Selection table.
and Q
REG
(1)
SELmode = LOW
SELmode = MID
SELmode = HIGH
LVPECL
LVDS
LVPECL
LVDS
Output Frequency = 622MHz - 666.5MHz
Output Frequency = 155.5MHz - 166.6MHz
V
OUT(+)
Test Conditions
V
V
OUT(+)
DD
7
and V
= 3.465V
= V
OUT(-)
OUT(-)
= 0V
19.44
19.44
1.125
Min.
Min.
-100
-600
-247
155.52
155.52
622.08
100
247
—
-20
0.9
—
—
—
—
40
19.44
19.44
40
Min.
—
—
—
—
—
—
65
—
—
45
GR-253 Sect. 5.6.2.2
INDUSTRIAL TEMPERATURE RANGE
±450
Typ.
Typ.
Typ.
—
—
—
—
—
—
—
—
—
1.2
—
50
50
60
150
100
150
100
0.3
—
—
—
—
—
—
—
9
6
10
80
1
V
DD
666.52
666.52
1.375
Max.
Max.
-454
166.63
666.52
666.52
666.52
+20
100
150
600
454
—
60
60
50
50
24
12
Max.
0.65
- 0.05
667
120
—
—
—
—
0.1
20
55
2
ps (RMS)
MHz
MHz
MHz
MHz
MHz
Unit
Unit
KHz
Unit
ppm
ppm
µA
mV
mV
mV
mV
mV
mA
mA
%
%
dB
%
us
ps
ps
ps
V
V