74HCT7046AN,112 NXP Semiconductors, 74HCT7046AN,112 Datasheet - Page 18

IC PLL W/LOCK DETECTOR 16DIP

74HCT7046AN,112

Manufacturer Part Number
74HCT7046AN,112
Description
IC PLL W/LOCK DETECTOR 16DIP
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCTr
Datasheet

Specifications of 74HCT7046AN,112

Number Of Circuits
1
Package / Case
16-DIP (0.300", 7.62mm)
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:3
Differential - Input:output
No/No
Frequency - Max
19MHz
Divider/multiplier
No/No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Frequency-max
19MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Operating Supply Voltage
4.5 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HCT7046AN
74HCT7046AN
933827480112
Philips Semiconductors
Demodulator section
Voltages are referenced to GND (ground = 0 V)
AC CHARACTERISTICS FOR 74HCT
Phase comparator section
GND = 0 V; t
December 1990
SYMBOL
R
V
R
SYMBOL
t
t
t
t
V
PHL
PZH
PHZ
THL
OFF
I(p-p)
Phase-locked-loop with lock detector
S
D
/ t
/ t
/ t
/ t
TLH
PLH
PZL
PLZ
resistor range
offset voltage
dynamic output
r
resistance at DEM
PARAMETER
propagation delay
3-state output enable
3-state output disable
output transition time
AC coupled input sensitivity
VCO
= t
SIG
to PC1
time SIG
to PC2
time SIG
to PC2
(peak-to-peak value) at
SIG
PARAMETER
f
= 6 ns; C
IN
IN
IN
, COMP
or COMP
to V
OUT
OUT
OUT
IN
IN
DEMOUT
, COMP
, COMP
L
IN
= 50 pF
IN
OUT
IN
IN
50
min. typ. max. min. max. min. max.
min. typ.
25
20
25
21
27
35
7
15
300
25
T
max. min. max.
40
56
65
15
74HCT
amb
18
40 to 85
( C)
T
74HCT
amb
40 to 85
( C)
50
70
81
19
40 to 125
min.
40 to 125
UNIT
k
mV
60
84
98
22
max.
74HC/HCT7046A
4.5
4.5
4.5
V
(V)
UNIT
ns
ns
ns
mV
CC
ns
TEST CONDITIONS
at R
leakage current can
influence V
V
V
over R
see Fig.13
V
Product specification
I
CC
DEMOUT
= V
4.5
4.5
4.5
4.5
4.5
; values taken
S
V
CONDITIONS
(V)
CC
VCOIN
OTHER
S
300 k the
range;
TEST
= 1/2 V
Fig.14
Fig.15
Fig.15
Fig.14
f
1 MHz
DEMOUT
i
OTHER
= 1/2
=
CC

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