ICS932S421BGLF IDT, Integrated Device Technology Inc, ICS932S421BGLF Datasheet - Page 13

• Manufacturer Part Number: ICS932S421BGLF
• Description: IC PCIE GEN2 MAIN CLOCK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr
• Series: -r

Specifications of ICS932S421BGLF

• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 350mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.33 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Input: -
• Output: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output: -
• Input: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 932S421BGLF

IDT
SMBus Table: Output Enable Register
SMBus Table: Output Enable Register
SMBus Table: Output Enable Register
SMBus Table: Stop Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
TM
Byte 0
Byte 1
Byte 2
Byte 3
PCIe Gen2 and QPI Clock for Intel-Based Servers
CPU, SRC, PCI
26,27
23,24
21,22
18,19
16,17
45,46
26,27
23,24
21,22
18,19
16,17
36,37
39,40
42,43
NA
NA
NA
54
55
11
10
13
11
10
6
5
4
3
9
9
Pin #
Pin #
Pin #
Pin #
Spread Spectrum Enable
PCICLK_F2 Stop En
PCICLK_F1 Stop En
PCICLK_F0 Stop En
SRCCLK2 Stop En
PCICLK_F2 Enable
PCICLK_F1 Enable
PCICLK_F0 Enable
SRCCLK4 Stop En
SRCCLK3 Stop En
SRCCLK1 Stop En
SRCCLK0 Stop En
SRCCLK2 Enable
SRCCLK7 Enable
SRCCLK6 Enable
SRCCLK5 Enable
SRCCLK4 Enable
SRCCLK3 Enable
SRCCLK1 Enable
SRCCLK0 Enable
48MHz Enable
REF1 Enable
REF0 Enable
CPUCLK3
CPUCLK2
CPUCLK1
CPUCLK0
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Name
Name
Name
Name
Default: not affected by
Free-Running Control,
Control Function
Control Function
Control Function
Control Function
PCI/SRC_STOP
Spread Off/On
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
(Byte 6, bit 3)
RESERVED
13
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Free-Running
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Low
Disable-Low
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Hi-Z
Disable-Low
Disable-Low
Disable-Low
Disable-Low
Disable-Low
Disable-Low
Disable-Low
Disable-Low
Spread Off
0
0
0
0
Spread On
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
1
1
1
1
1340G—01/26/10
PWD
PWD
PWD
PWD
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1