ICS932S421BGLF IDT, Integrated Device Technology Inc, ICS932S421BGLF Datasheet - Page 14

• Manufacturer Part Number: ICS932S421BGLF
• Description: IC PCIE GEN2 MAIN CLOCK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr
• Series: -r

Specifications of ICS932S421BGLF

• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 350mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.33 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Input: -
• Output: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output: -
• Input: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 932S421BGLF

IDT
SMBus Table: Stop and Power Down Mode Drive Control Register
SMBus Table: Stop and Power Down Mode Drive Control Register
SMBus Table: Test Mode and FS Readback Register
SMBus Table: Vendor & Revision ID Register
Byte 5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
TM
Byte 4
Byte 6
Byte 7
PCIe Gen2 and QPI Clock for Intel-Based Servers
PCI, SRC
45,46
45,46
45,46
36,37
39,40
42,43
36,37
39,40
42,43
SRC
36,37
39,40
42,43
54,55
SRC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
Test Clock Mode Entry
SRC Stop Drive Mode
CPUCLK3 Stop Drive
CPUCLK2 Stop Drive
CPUCLK1 Stop Drive
CPUCLK0 Stop Drive
CPUCLK2 PD Drive
CPUCLK1 PD Drive
CPUCLK0 PD Drive
SRC PD Drive Mode
Test Mode Selection
CPUCLK3 PD Drive
REF Drive Strength
PCI_STOP Control
CPUCLK3 Stop En
CPUCLK2 Stop En
CPUCLK1 Stop En
CPUCLK0 Stop En
Name
Name
Name
Name
FS_C
FS_B
FS_A
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Stop non-free running PC
Default: not affected by
Free-Running Control,
Test Mode Selection
Control Function
Control Function
Drive Mode in Stop
Drive Mode in Stop
Drive Mode in Stop
Drive Mode in Stop
Control Function
Control Function
Drive Mode in PD
Drive Mode in PD
Drive mode in PD
Drive mode in PD
and SRC clocks.
FS_C readback
FS_B readback
FS_A readback
Driven in STOP
REVISION ID
VENDOR ID
Driven in PD
CPU_STOP
Test Mode
1X or 2X
RESERVED
RESERVED
RESERVED
14
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
Free-Running
Free-Running
Free-Running
Free-Running
See 932S421 Functionality
Disable
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Stop
Hi-Z
1X
0
0
0
0
-
-
-
-
-
-
-
-
Table
Stoppable
Stoppable
Stoppable
Stoppable
REF/N
Enable
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Run
2X
1
1
1
1
-
-
-
-
-
-
-
-
1340G—01/26/10
Latch
Latch
Latch
PWD
PWD
PWD
PWD
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1