MPC92439AC IDT, Integrated Device Technology Inc, MPC92439AC Datasheet

MPC92439AC

Manufacturer Part Number

MPC92439AC

Description

IC SYNTHESIZER LVPECL 32-LQFP

Manufacturer

IDT, Integrated Device Technology Inc

Type

Clock/Frequency Synthesizerr

Datasheet

1.MPC92439ACR2.pdf (15 pages)

Specifications of MPC92439AC

Pll

Yes

Input

Crystal

Output

LVPECL

Number Of Circuits

Ratio - Input:output

1:1

Differential - Input:output

No/Yes

Frequency - Max

900MHz

Divider/multiplier

Yes/No

Voltage - Supply

3.135 V ~ 3.465 V

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

32-LQFP

Frequency-max

900MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

MPC92439AC

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

MPC92439ACR2

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

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performance clock generation in mid-range to high-performance telecom, networking and

computing applications. With output frequencies from 3.125 MHz to 900 MHz and the

support of differential LVPECL output signals the device meets the needs of the most

demanding clock applications.

Features

•

Functional Description

reference. The frequency of the internal crystal oscillator or external reference clock signal is

multiplied by the PLL. The VCO within the PLL operates over a range of 400 to 900 MHz. Its

output is scaled by a divider that is configured by either the serial or parallel interfaces. The

crystal oscillator frequency f

termine the output frequency.

be M times the reference frequency by adjusting the VCO control voltage. Note that for

some values of M (either too high or too low) the PLL will not achieve phase lock. The PLL

will be stable if the VCO frequency is within the specified VCO frequency range (400 to 900

MHz). The M-value must be programmed by the serial or parallel interface.

and can provide one of four division ratios (1, 2, 4, or 8). This divider extends performance

of the part while providing a 50% duty cycle. The output driver is driven differentially from

the output divider, and is capable of driving a pair of transmission lines terminated 50Ω to

supply for the core logic and output drivers to minimize noise induced jitter.

the values at the M[6:0] and N[1:0] inputs to configure the internal counters. It is recom-

mended on system reset to hold the P_LOAD input LOW until power becomes valid. On the

LOW-to-HIGH transition of P_LOAD, the parallel inputs are captured. The parallel interface

has priority over the serial interface. Internal pullup resistors are provided on the M[6:0] and

N[1:0] inputs prevent the LVCMOS compatible control inputs from floating. The serial inter-

face centers on a twelve bit shift register. The shift register shifts once per rising edge of the

S_CLOCK input. The serial input S_DATA must meet setup and hold timing as specified in

the AC Characteristics section of this document. The configuration latches will capture the

value of the shift register on the HIGH-to-LOW edge of the S_LOAD input. See

output reflects various internal node values, and is controlled by the T[2:0] bits in the serial data stream. In order to minimize the PLL jitter, it

is recommended to avoid active signal on the TEST output. The PWR_DOWN pin, when asserted, will synchronously divide the FOUT by 16.

The power down sequence is clocked by the PLL reference clock, thereby causing the frequency reduction to happen relatively slowly. Upon

de-assertion of the PWR_DOWN pin, the FOUT input will step back up to its programmed frequency in four discrete increments.

MPC92439 REVISION 4 OCTOBER 27, 2009

The MPC92439 is a 3.3 V compatible, PLL based clock synthesizer targeted for high

The internal crystal oscillator uses the external quartz crystal as the basis of its frequency

The feedback path of the PLL is internal. The PLL adjusts the VCO output frequency to

The PLL post-divider N is configured through either the serial or the parallel interfaces,

The configuration logic has two sections: serial and parallel. The parallel interface uses

3.125 MHz to 900 MHz synthesized clock output signal

Differential LVPECL output

LVCMOS compatible control inputs

On-chip crystal oscillator for reference frequency generation

Alternative LVCMOS compatible reference input

3.3V power supply

Fully integrated PLL

Minimal frequency overshoot

Serial 3-wire programming interface

Parallel programming interface for power-up

28-PLCC and 32-LQFP packaging

28-Lead and 32-lead Pb-free packages available

SiGe Technology

Ambient temperature range 0°C to + 70°C

Pin and function compatible to the MC12439 and MPC9239

– 2.0V. The positive supply voltage for the internal PLL is separated from the power

XTAL

900MHz, Low Voltage,

LVPECL Clock Syntheesizer

, the PLL feedback-divider M and the PLL post-divider N de-

PROGRAMMING INTERFACE

Notes:

(1) FN, FA suffix: leaded terminations

(2) EI, AC suffix: lead-free, RoHS-compliant, EPP

MPC92439EI

MPC92439FA

MPC92439AC

MPC92439KLF

P R O P O S E D

ORDERING INFORMATION

Device

900MHZ LOW VOLTAGE

32-LEAD VFQFN PACKAGE

CLOCK SYNTHESIZER

28-LEAD PLCC PACKAGE

32-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

for more information. The TEST

CASE 873A-03

CASE 776-02

AC SUFFIX

FN SUFFIX

FA SUFFIX

EI SUFFIX

K SUFFIX

VFQFN-32 (Pb-Free)

PLCC-28 (Pb-Free)

LQFP-32 (Pb-Free)

MPC92439

(2)

DATA SHEET

(1)

(2)

Package

LQFP-32

Related parts for MPC92439AC

MPC92439AC Summary of contents

Page 1

... LQFP PACKAGE 32-LEAD LQFP PACKAGE 32-LEAD VFQFN PACKAGE Pb-FREE PACKAGE Notes: (1) FN, FA suffix: leaded terminations (2) EI, AC suffix: lead-free, RoHS-compliant, EPP ORDERING INFORMATION Device MPC92439EI MPC92439FA MPC92439AC MPC92439KLF PROGRAMMING INTERFACE 1 ©2009 Integrated Device Technology, Inc. MPC92439 DATA SHEET (1) FN SUFFIX CASE 776-02 ...

Page 2

MPC92439 Data Sheet XTAL_IN 1 XTAL XTAL_OUT 10 – 20 MHz 0 FREF_EXT V CC XTAL_SEL P_LOAD S_LOAD P/S S_DATA S_CLOCK V CC M[0:6] N[1:0] PWR_DOWN S_CLOCK 26 S_DATA 27 S_LOAD 28 ...

Page 3

MPC92439 Data Sheet GND 25 TEST MPC92439 GND 29 30 FOUT 31 FOUT Figure 4. 32-Lead ...

Page 4

MPC92439 Data Sheet Table 1. Pin Configurations Pin I/O XTAL_IN, XTAL_OUT FREF_EXT Input FOUT, FOUT Output TEST Output XTAL_SEL Input PWR_DOWN Input S_LOAD Input P_LOAD Input S_DATA Input S_CLOCK Input M[0:6] Input N[1:0] Input OE Input GND Supply V Supply ...

Page 5

MPC92439 Data Sheet Table 3. Function Table Input XTAL_SEL OE Outputs disabled, FOUT is stopped in the logic low state PWR_DOWN Table 4. General Specifications Symbol Characteristics V Output Termination Voltage TT MM ESD Protection (Machine Model) HBM ESD Protection ...

Page 6

MPC92439 Data Sheet Table 6. DC Characteristics (V Symbol Characteristics LVCMOS Control Inputs (FREF_EXT, POWER_DOWN, XTAL_SEL, P_LOAD, S_LOAD, S_DATA, S_CLOCK, M[0:8], N[0:1]. OE) V Input High Voltage IH V Input Low Voltage IL I (1) Input Current IN (2) Differential ...

Page 7

MPC92439 Data Sheet Table 8. MPC92439 Frequency Operating Range (in MHz) VCO frequency for an crystal interface frequency of M M[6: 0010100 21 0010101 22 0010110 23 0010111 24 0011000 25 0011001 26 0011010 27 0011011 28 0011100 ...

Page 8

MPC92439 Data Sheet Programming the MPC92439 Programming the MPC92439 amounts to properly configuring the internal PLL dividers to produce the desired synthesized frequency at the output. The output frequency can be represented by this formula: ⋅ M ÷ ...

Page 9

MPC92439 Data Sheet transition on the S_LOAD input will latch the new divide values into the counters. Figure 7 illustrates the timing diagram for both a parallel and a serial load of the MPC92439 synthesizer. M[6:0] and N[1:0] are normally ...

Page 10

MPC92439 Data Sheet the V supply and the MPC92439 pin of the MPC92439. From the CC data sheet, the V current (the current sourced through the CC_PLL V pin) is maximum 20 mA, assuming that a minimum of CC_PLL 2.835 ...

Page 11

MPC92439 Data Sheet As an alternative to parallel resonance mode crystals, the oscillator also works with crystals specified in the series resonance mode. With series resonance crystals, the oscillator frequency and the synthesized output frequency of the MPC92439 will be ...

Page 12

MPC92439 Data Sheet Package Outline and Package Dimensions MPC92439 REVISION 4 OCTOBER 27, 2009 900MHZ, LOW VOLTAGE, LVPECL CLOCK SYNTHESIZER PACKAGE DIMENSIONS CASE 776-02 ISSUE D PLCC PLASTIC PACKAGE 12 ©2009 Integrated Device Technology, Inc. ...

Page 13

MPC92439 Data Sheet D1/2 PIN 1 INDEX E1 D/2 4X 0. 28X SEATING PLANE (S) A1 DETAIL AD MPC92439 REVISION 4 OCTOBER 27, ...

Page 14

MPC92439 Data Sheet Package Outline - K Suffix for 32 Lead VFQFN S eating Plan e Ind ex Area N Singulation Singulation To p View D Chamfer 4x 0.6 x 0.6 max OPTIONAL Bottom View w/Type ...

Page 15

MPC92439 Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

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