NB4N441MNG ON Semiconductor, NB4N441MNG Datasheet - Page 10

IC SYNTH PLL CLK LVPECL 24-QFN

NB4N441MNG

Manufacturer Part Number
NB4N441MNG
Description
IC SYNTH PLL CLK LVPECL 24-QFN
Manufacturer
ON Semiconductor
Type
Clock/Frequency Synthesizerr
Datasheet

Specifications of NB4N441MNG

Pll
Yes
Input
LVCMOS, LVTTL, Crystal
Output
LVPECL
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
Yes/Yes
Frequency - Max
425MHz
Divider/multiplier
No/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TFQFN Exposed Pad
Frequency-max
425MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Jitter Performance
generation and distribution. Clock jitter can be defined as the
deviation in a clock’s output transition from its
ideal position.
variation between two adjacent cycles over a defined
number of observed cycles. The number of cycles observed
is application dependent but the JEDEC specification is
1000 cycles.
highest and lowest acquired value and is represented as the
width of the Gaussian base.
are confused with one another. The typical method of
measuring jitter is to look at the timing signal with an
oscilloscope and observe the variations in period−to−period
Jitter is a common parameter associated with clock
Cycle−to−Cycle Jitter (short−term) is the period
Peak−to−Peak Jitter is the difference between the
There are different ways to measure jitter and often they
Figure 8. Cycle−to−Cycle Jitter
Figure 9. Peak−to−Peak Jitter
T
0
Time
T
JITTER(cycle−cycle)
= T
T
1
1
− T
Typical
Gaussian
Distribution
0
RMS
or one
Sigma
Jitter
http://onsemi.com
NB4N441
10
or cycle−to−cycle. If the scope is set up to trigger on every
rising or falling edge, set to infinite persistence mode and
allowed to trace sufficient cycles, it is possible to determine
the maximum and minimum periods of the timing signal.
Digital scopes can accumulate a large number of cycles,
create a histogram of the edge placements and record
peak−to−peak as well as standard deviations of the jitter.
Care must be taken that the measured edge is the edge
immediately following the trigger edge. These scopes can
also store a finite number of period durations and
post−processing software can analyze the data to find the
maximum and minimum periods.
resulted in advanced jitter measurement techniques. The
Tektronix TDS−series oscilloscopes have superb jitter
analysis capabilities on non−contiguous clocks with their
histogram and statistics capabilities. The Tektronix
TDSJIT2/3 Jitter Analysis software provides many key
timing parameter measurements and will extend that
capability by making jitter measurements on contiguous
clock and data cycles from single−shot acquisitions.
correlated.
observed at the end of a period’s edge when compared to the
position of the perfect reference clock’s edge and is specified
by the number of cycles over which the jitter is measured.
The number of cycles used to look for the maximum jitter
varies
10,000 observed cycles.
jitter, which rivals that of SAW based oscillators. This jitter
performance comes with the added flexibility associated
with a synthesizer over a fixed frequency oscillator. The
jitter data presented should provide users with enough
information to determine the effect on their overall timing
budget. The jitter performance meets the needs of most
system designs while adding the flexibility of frequency
margining and field upgrades. These features are not
available with a fixed frequency SAW oscillator.
Recent hardware and software developments have
M1 by Amherst was used as well and both test methods
Long−Term Period Jitter is the maximum jitter
The NBC4N441 exhibit long term and cycle−to−cycle
by
application
but
the
JEDEC
spec
is

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