CY28346ZXCT Cypress Semiconductor Corp, CY28346ZXCT Datasheet - Page 6

• Manufacturer Part Number: CY28346ZXCT
• Description: IC CLOCK SYNTHESIZER 56-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Synchronizer, Fanout Distribution, Spread Spectrum Clock Generatorr

Specifications of CY28346ZXCT

• Pll: Yes
• Input: Clock, Crystal
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 5:17
• Differential - Input:output: No/Yes
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP II
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-07331 Rev. *C
Dial-a-Frequency Features
SMBus Dial-a-Frequency feature is available in this device via
Byte8 and Byte9.
P is a large-value PLL constant that depends on the frequency
selection achieved through the hardware selectors (S1, S0). P
value may be determined from Table 2.
Table 2. P Value
Dial-a-dB Features
SMBus Dial-a-dB feature is available in this device via Byte8
and Byte9.
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is a modulation technique used to
minimizing EMI radiation generated by repetitive digital
signals. A clock presents the greatest EMI energy at the center
frequency it is generating. Spread Spectrum distributes this
energy over a specific and controlled frequency bandwidth
VDD
S(1:0)
0 0
0 1
1 0
1 1
M U LT S E L
MULTSEL
C P U C
C P U T
CPUC
220Ω
CPUT
475Ω
33Ω
33Ω
32005333
48008000
96016000
64010667
Figure 1. 1.0V Test Load Termination
Figure 2. 0.7V Test Load Termination
49.9Ω
49.9Ω
P
T
T
P C B
P C B
T
T
PCB
PCB
63.4Ω
therefore causing the average energy at any one point in this
band to decrease in value. This technique is achieved by
modulating the clock away from its resting frequency by a
certain percentage (which also determines the amount of EMI
reduction). In this device, Spread Spectrum is enabled by
setting specific register bits in the SMBus control bytes.
Table 3 is a listing of the modes and percentages of Spread
Spectrum modulation that this device incorporates.
Table 3. Spread Spectrum
Test and Measurement Set-up
For Differential CPU Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
SS2
0
0
0
0
1
1
1
1
475Ω
63.4Ω
SS1
2pF
2pF
0
0
1
1
0
0
1
1
33.2Ω
33.2Ω
Measurement Point
Measurement Point
SS0
0
1
0
1
0
1
0
1
2 pF
2p F
Spread Mode
M easurem ent P oint
M easurem ent P oint
Center
Center
Center
Center
Down
Down
Down
Down
CY28346
+0.00, –0.25
+0.00, –0.50
+0.00, –0.75
+0.00, –1.00
+0.13, –0.13
+0.25, –0.25
+0.37, –0.37
+0.50, –1.50
Spread%
Page 6 of 20