CY2213ZXC-2T Cypress Semiconductor Corp, CY2213ZXC-2T Datasheet - Page 4

• Manufacturer Part Number: CY2213ZXC-2T
• Description: IC PROG PECL CLOCK GEN 16-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Generator, Fanout Distributionr

Specifications of CY2213ZXC-2T

• Number Of Circuits: 1
• Package / Case: 16-TSSOP
• Pll: Yes
• Input: Crystal
• Output: LVPECL
• Ratio - Input:output: 1:2
• Differential - Input:output: No/Yes
• Frequency - Max: 400MHz
• Divider/multiplier: No/Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Frequency-max: 500MHz
• Maximum Input Frequency: 133 MHz
• Minimum Input Frequency: 1 MHz
• Output Frequency Range: 125 MHz to 500 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-07263 Rev. *E
PLL Frequency = Reference x P/Q = Output
Absolute Maximum Conditions
The following table reflects stress ratings only, and functional
operation at the maximums are not guaranteed.
Crystal Requirements
Requirements to use parallel mode fundamental xtal. External
capacitors are required in the crystal oscillator circuit. Please
refer to the application note entitled Crystal Oscillator Topics
for details.
DC Electrical Specifications
AC Electrical Specifications
V
V
X
V
T
V
V
R
t
f
f
C
3.3V DC Device Characteristics (Driving load, Figure 5)
V
V
3.3V DC Device Characteristics (Driving load, Figure 6)
V
V
Note:
PU
IN
XTAL,IN
1.
A
DD,ABS
I, ABS
F
DD
IL
IH
OH
OL
OH
OL
PUP
IN,CMOS
Parameter
Parameter
Parameter
Parameter
Parameter
Parameter
Capacitance measured at freq. = 1 MHz, DC Bias = 0.9V, and VAC < 100 mV.
Output high voltage, referenced to V
Output low voltage, referenced to V
Output high voltage
Output low voltage
Max. voltage on V
Max. voltage on any pin with respect to ground
Supply voltage
Ambient operating temperature
Input signal low voltage at pin S
Input signal high voltage at pin S
Internal pull-up resistance
Power-up time for all V
(power ramps must be monotonic)
Input frequency with driven reference
Input frequency with crystal input
Input capacitance at S pin
Frequency
Reference
DD
, or V
DD
Description
Description
Description
Description
Description
Description
s to reach minimum specified voltage
[1]
DDX
Q
Figure 4. PLL Block Diagram
with respect to ground
DD
DD
P
PLL
VCO
–1.02
–1.81
Min.
Min.
1.1
0
Min.
Min.
3.00
0.65
0.05
Min.
–0.5
–0.5
Min.
10
10
10
0
1
Output
–0.95
–1.70
Typ.
Typ.
1.2
0
V
31.25
Max.
Max.
31.25
3.60
0.35
Max.
100
500
133
DD
Max.
70
10
4.0
+0.5
–0.88
–1.62
Max.
Max.
1.3
0
CY2213
Page 4 of 10
Unit
MHz
Unit
V
V
MHz
MHz
Unit
k
ms
°C
pF
Unit
V
DD
DD
Unit
Unit
V
V
V
V
V
V
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