MC88915FN70R2 Freescale Semiconductor, MC88915FN70R2 Datasheet
MC88915FN70R2
Specifications of MC88915FN70R2
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MC88915FN70R2 Summary of contents
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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Skew CMOS PLL Clock Driver The MC88915 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock designed to provide clock distribution for ...
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MC88915 FEEDBACK SYNC (0) 0 PHASE/FREQ SYNC (1) 1 REF_SEL PLL_EN RST PIN SUMMARY Pin Name Num I/O 1 SYNC[0] Input Reference clock input 1 SYNC[1] Input Reference clock input 1 REF_SEL Input Chooses reference between sync[0] ...
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DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND 5.0V Symbol Parameter V IH Minimum High–Level Input Voltage V IL Maximum Low–Level Input Voltage V OH Minimum High–Level Output Voltage V ...
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MC88915 AC ELECTRICAL CHARACTERISTICS ( + 5.0V 5 50pF) Symbol t RISE , t FALL Rise and Fall Times, all Outputs Into a 50 pF, 500 (Outputs) (Between 0.2V ...
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General AC Specification Notes 1. Several specifications can only be measured when the MC88915 is in phase–locked operation not possible to have the part in phase–lock on ATE (automated test equipment). Statistical characterization techniques were used to guarantee ...
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MC88915 RC1 EXTERNAL LOOP FILTER 330 R2 0 With the 470K resistor tied in this fashion, the t PD specification measured at the input pins is 2.25ns 1.0ns SYNC INPUT 2.25ns OFFSET FEEDBACK OUTPUT Figure ...
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Calculation of Total Output–to–Skew between multiple parts (Part–to–Part skew) By combining the t PD specification and the information in Note 5, the worst case output–to–output skew between multiple 88915’s connected in parallel can be calculated. This calculation assumes that ...
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MC88915 SYNC INPUT (SYNC[1] or SYNC[0 FEEDBACK INPUT Q/2 OUTPUT t SKEWALL Q0 – Q4 OUTPUTS Q5 OUTPUT 2X_Q OUTPUT Figure 4. Output / Input Switching Waveforms and Timing Diagrams (These waveforms represent the hook–up configuration of Figure ...
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MHz FEEDBACK SIGNAL HIGH RST Q5 FEEDBACK LOW REF_SEL 12.5 MHz INPUT CRYSTAL SYNC[0] MC88915 OSCILLATOR ANALOG V CC EXTERNAL LOOP RC1 FILTER ANALOG GND FQ_SEL Q0 HIGH Figure 5a. Wiring Diagram and Frequency Relationships With Q/2 Output Feed ...
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MC88915 0.1 F HIGH 10 F LOW FREQ BYPASS Figure 6. Recommended Loop Filter and Analog Isolation Scheme for the MC88915 Notes Concerning Loop Filter and Board Layout Issues 1. Figure 6 shows a loop filter and analog isolation scheme ...
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CLOCK @ f SYSTEM CLOCK SOURCE DISTRIBUTE CLOCK @ f CLOCK @ 2f AT POINT OF USE Figure 7. Representation of a Potential Multi–Processing Application Utilizing the MC88915 for Frequency Multiplication and Low Board–to–Board Skew MC88915 System Level Testing Functionality ...
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MC88915 –N– –L– 0.010 (0.250) T L– NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. ...
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...