MPC9608AC Freescale Semiconductor, MPC9608AC Datasheet - Page 5

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MPC9608AC

Manufacturer Part Number
MPC9608AC
Description
IC CLOCK BUFFER 1:10 32-LQFP
Manufacturer
Freescale Semiconductor
Type
Fanout Distribution, Multiplexer , Zero Delay Bufferr
Datasheet

Specifications of MPC9608AC

Pll
Yes with Bypass
Input
LVCMOS
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
1:10
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC9608AC
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
MPC9608ACR2
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Advanced Clock Drivers Device Data
Freescale Semiconductor
Table 7. AC Characteristics (V
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. PLL mode requires PLL_EN = 0 to enable the PLL and zero-delay operation.
3. In bypass mode, the MPC9608 divides the input reference clock.
4. Applies for bank A and for bank B if BSEL = 0. If BSEL = 1, the minimum and maximum output frequency of bank B is divided by two.
5. Calculation of reference duty cycle limits: DC
6. -3 dB point of PLL transfer characteristics.
Symbol
t
t
t
t
t
JIT(PER)
PW, MIN
PLZ, HZ
PZL, LZ
JIT(CC)
t
t
t
JIT(∅)
f
LOCK
f
f
SK(o)
t
t
BW
t
DC
REF
REF
max
r
r
(∅)
, t
, t
f
f
= 100 MHz the input duty cycle range is 20% < DC < 80%.
Input reference frequency in PLL mode
Input reference frequency in PLL bypass mode
Output Frequency
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Propagation Delay (SPO) CCLK to FB_IN
Output-to-Output Skew
Output Duty Cycle
Output Rise/Fall Time
Output Disable Time
Output Enable Time
Cycle-to-cycle Jitter
Period Jitter
I/O Phase Jitter
PLL closed loop bandwidth
Maximum PLL Lock Time
(4)
Characteristics
CC
= 3.3 V ± 5%, T
(6)
(5)
f
REF
f
REF
All outputs, including QFB
= 12.5 MHz to 100 MHz
= 100 MHz and above
REF, MIN
(2)
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
A
Within a bank
= t
Bank-to-bank
= -40° to 85°C)
PW,MIN
(3)
RMS (1 σ)
* f
REF
TT
.
*100% and DC
-1.75% of
(1)
12.5
12.5
-175
t
Min
100
100
2.0
PER
0.1
50
25
50
25
45
0
REF,MAX
0.5 – 1.3
7 – 15
2 – 7
1 – 3
Typ
50
10
= 100% – DC
+1.75% of t
+175
Max
200
100
200
200
100
100
150
150
150
125
1.0
1.0
50
25
50
25
80
55
10
10
REF,MIN
PER
. For example, at
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ms
ns
ns
ps
ps
ps
ns
ns
ns
ps
ps
ps
%
BSEL = 0
BSEL = 0
BSEL = 0
BSEL = 0
0.8 V to 2.0 V
PLL Locked
0.55 V to 2.4 V
BSEL = 0
BSEL = 0
BSEL = 0
Condition
MPC9608
5

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