CY22800FXC-010A Cypress Semiconductor Corp, CY22800FXC-010A Datasheet - Page 8

IC PROG CLOCK GEN 8-SOIC

CY22800FXC-010A

Manufacturer Part Number
CY22800FXC-010A
Description
IC PROG CLOCK GEN 8-SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of CY22800FXC-010A

Pll
Yes
Input
Clock, Crystal
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
1:3
Differential - Input:output
No/No
Frequency - Max
125MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
187.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1819
DC Electrical Specifications
AC Electrical Characteristics (V
Test Circuit
Figure 3. Test Circuit Diagram
Document #: 001-07704 Rev. *C
I
I
C
C
I
I
f
V
V
V
DC
t
t
t
OH
OL
IH
IL
ΔXO
3
4
10
VCXO
IH
IL
IN1
IN2
Parameter
Parameter
V
DD
0.1μF
Output High Current
Output Low Current
Input Capacitance
Input Capacitance
Input High Current
Input Low Current
VCXO Pullability Range
VCXO Input Range
Input High Voltage
Input Low Voltage
Output Duty Cycle
Rising Edge Slew Rate
Falling Edge Slew Rate
PLL Lock Time
OUTPUTS
GND
Name
Name
DD
= 3.3V
)
C
Duty Cycle is defined in
Output Clock Rise Time, 20% - 80% of V
Output Clock Fall Time, 80% - 20% of V
V
V
All input pins except XIN and XOUT
XIN and XOUT pins for non-VCXO applications
V
V
CMOS levels, 70% of V
CMOS levels, 30% of V
LOAD
CLKout
OH
OL
IH
IL
= 0V
= V
= 0.5, V
= V
DD
DD
– 0.5, V
DD
= 3.3V (sink)
Timing Definitions
Figure 4. Duty Cycle Definition; DC = t2/t1
Figure 5. Rise and Fall Time Definitions
Description
Description
DD
CLK
= 3.3V (source)
DD
DD
Figure
CLK
4, 50% of V
50%
t1
t2
t3
DD
DD
20%
DD
80%
±150
Min
Min
0.8
0.8
0.7
12
45
12
0
50%
t4
Typ.
Typ.
1.4
1.4
24
24
24
50
5
CY22800
Max
Max
V
Page 8 of 10
0.3
55
10
50
7
3
DD
V/ns
V/ns
Unit
ppm
Unit
V
V
mA
mA
ms
pF
pF
μA
μA
%
V
DD
DD
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