NE555N STMicroelectronics, NE555N Datasheet - Page 5

• Manufacturer Part Number: NE555N
• Description: IC TIMER SINGLE BIPOLAR 8 DIP
• Manufacturer: STMicroelectronics
• Type: 555 Type, Timer/Oscillator (Single)r

Specifications of NE555N

• Frequency: 500kHz
• Voltage - Supply: 4.5 V ~ 16 V
• Current - Supply: 10mA
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Number Of Internal Timers: 1
• Supply Voltage (max): 16 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Current, Supply: 3 mA (Typ.)
• Number Of Pins: 8
• Package Type: DIP
• Temperature, Operating: 0 °C
• Temperature, Storage: -65 to +150 °C
• Time, Fall, Output: 100 ns (Typ.)
• Time, Rise, Output: 100 ns (Typ.)
• Voltage, Control: 10 V (Typ.)
• Voltage, Output, High Level: 12.5 V (Typ.) @ 200 mA
• Voltage, Output, Low Level: 2.5 V (Typ.) @ 200 mA
• Voltage, Supply: 4.5 to 16 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-1963-5

Figure 7 : High Output Voltage Drop versus
Figure 8 : Delay Time versus Supply Voltage
Figure 9 : Propagation Delay versus Voltage
Output
Level of Trigger Value
APPLICATION INFORMATION
MONOSTABLE OPERATION
In the monostable mode, the timer functions as a
one-shot. Referring to figure 10 the external ca-
pacitor is initially held discharged by a transistor
inside the timer.
Figure 10 :
The circuit triggers on a negative-going input sig-
nal when the level reaches 1/3 V
gered, the circuit remains in this state until the set
time has elapsed, even if it is triggered again dur-
ing this interval. The duration of the output HIGH
state is given by t = 1.1 R
mined by figure 12.
Notice that since the charge rate and the threshold
level of the comparator are both directly propor-
tional to supply voltage, the timing interval is inde-
pendent of supply. Applying a negative pulse si-
multaneously to the reset terminal (pin 4) and the
trigger terminal (pin 2) during the timing cycle dis-
charges the external capacitor and causes the cy-
cle to start over. The timing cycle now starts on the
positive edge of the reset pulse. During the time
the reset pulse in applied, the output is driven to its
LOW state.
When a negative trigger pulse is applied to pin 2,
the flip-flop is set, releasing the short circuit across
the external capacitor and driving the output
HIGH. The voltage across the capacitor increases
exponentially with the time constant t = R
When the voltage across the capacitor equals 2/3
V
discharge the capacitor rapidly and drivers the
output to its LOW state.
Figure 11 shows the actual waveforms generated
in this mode of operation.
When Reset is not used, it should be tied high to
avoid any possibly or false triggering.
CC
, the comparator resets the flip-flop which then
Trigger
Output
V
CC
= 5 to 15V
Reset
2
3
4
NE555
NE555-SA555-SE555
1
1
C
8
1
and is easily deter-
7
5
6
Control Voltage
CC
0.01 F
. Once trig-
R1
C1
1
C
5/9
1
.