DS1558W+ Maxim Integrated Products, DS1558W+ Datasheet - Page 5
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DS1558W+
Manufacturer Part Number
DS1558W+
Description
IC RTC W/NV RAM 3.3V 48-LQFP
Manufacturer
Maxim Integrated Products
Type
Watchdog Timer/NVSRAMr
Datasheet
1.DS1558W.pdf
(18 pages)
Specifications of DS1558W+
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Figure 1. BLOCK DIAGRAM
Table 1. OPERATING MOD
DATA READ MODE
The DS1558 is in the read mode whenever
ripple-throu
the last address input is stable, provided that
times are not m
access time
outputs are activ
inputs are changed while
(t
OH
V
V
SO
CC
), but then goes indeterminate until the next address access.
V
< V
< V
NOTE: ANY U
CC
V
> V
CC
CC
SO
gh access to any valid address location. Valid data is available at the DQ pins within t
< V
< V
(t
PF
OEA
et, valid data is available at the latter of chip-enable access (t
PF
PF
ated before t
NUSED UPPER ADDRESS PINS MUST BE CONNECTED TO V
). The state of the data input/output pins (DQ) is controlled by
V
V
V
V
CE
X
X
IH
IL
IL
IL
CE
V
V
AA
OE
X
X
X
X
and
IH
IL
, the data lines are driven to an intermediate state until t
OE
WE
V
V
V
ES
X
X
X
IH
IH
IL
remain valid, output data remains valid for output-data hold time
DQ0–DQ7
High-Z
High-Z
High-Z
High-Z
D
CE
D
CE
OUT
IN
is low and
5 of 18
and
OE
Data Retention
access times are satisfied. If
Deselect
Deselect
MODE
WE
Write
Read
Read
CC
is high. The device architecture allows
TO PROPERLY ADDRES
CMOS Standby
Battery Current
CEA
POWER
Standby
Active
Active
Active
) or at output-enable
CE
S THE RTC.
CE
AA
and
. If the address
or
OE
OE
AA
. If the
access
after