M41T00SM6F STMicroelectronics, M41T00SM6F Datasheet - Page 13

IC RTC SERIAL ACCESS 8-SOIC

M41T00SM6F

Manufacturer Part Number
M41T00SM6F
Description
IC RTC SERIAL ACCESS 8-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of M41T00SM6F

Memory Size
8B
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6458-2
M41T00SM6F

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41T00SM6F
Manufacturer:
ST
Quantity:
20 000
Part Number:
M41T00SM6FTR
Manufacturer:
ST
0
Table 2.
3.2
Addr
00h
01h
02h
03h
04h
05h
06h
07h
OUT
CEB
OF
D7
ST
0
0
0
TIMEKEEPER
Keys:
0 = must be set to '0'
CB = century bit
CEB = century enable bit
FT = frequency test bit
OF = oscillator fail bit
OUT = output level
S = sign bit
ST = stop bit
Calibrating the clock
The M41T00S is driven by a quartz-controlled oscillator with a nominal frequency of 32,768
Hz. The devices are tested not exceed ±35 ppm (parts per million) oscillator frequency error
at 25
When the calibration circuit is properly employed, accuracy improves to better than ±2 ppm
at 25°C.
The oscillation rate of crystals changes with temperature. The M41T00S design employs
periodic counter correction. The calibration circuit adds or subtracts counts from the
oscillator divider circuit at the divide by 256 stage, as shown in
number of times pulses which are blanked (subtracted, negative calibration) or split (added,
positive calibration) depends upon the value loaded into the five calibration bits found in the
calibration register. Adding counts speeds the clock up, subtracting counts slows the clock
down.
The calibration bits occupy the five lower order bits (D4-D0) in the calibration register 07h.
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is a
Sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
o
C, which equates to about ±1.53 minutes per month (see
CB
D6
FT
0
0
0
10 years
10 seconds
10 minutes
®
D5
S
0
0
register map
10 hours
10 date
10M
D4
0
D3
0
Hours (24-hour format)
Calibration
Date: day of month
D2
Seconds
Minutes
Month
Year
Day of week
D1
D0
Figure 11 on page
Figure 10 on page
Function/range BCD format
Century/hours
Calibration
Seconds
Minutes
Month
Date
Year
Day
0-1/00-23
15. The
00-59
00-59
01-31
01-12
00-99
15).
01-7
13/26

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