M41ST87WSS6F STMicroelectronics, M41ST87WSS6F Datasheet - Page 25

IC SUPERVISOR RTC/NVRAM 20-SSOP

M41ST87WSS6F

Manufacturer Part Number
M41ST87WSS6F
Description
IC SUPERVISOR RTC/NVRAM 20-SSOP
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheets

Specifications of M41ST87WSS6F

Memory Size
160B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Function
Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
Rtc Memory Size
1280 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial
Supply Current
500 nA
Clock Format
Ss
Clock Ic Type
RTC
Interface Type
I2C
Memory Configuration
128 X 8
Supply Voltage Range
2.7V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10616-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41ST87WSS6F
Manufacturer:
FSC
Quantity:
6 000
Part Number:
M41ST87WSS6F
Manufacturer:
ST
Quantity:
20 000
M41ST87Y, M41ST87W
Table 5.
1. With input capacitance = 70 pF and resistance = 50 Ω.
2. If the OF bit is set, t
Figure 20. RAM clear hardware hookup (SOX28 MX package only)
1. Most inverting charge pumps drive OUT to ground when device shut down is enabled (SHDN = logic low). Therefore, an n-
2. In order to avoid turning on an on-chip parasitic diode when driving V
Symbol
t
CLRD
channel enhancement mode MOSFET should be used to isolate the OUT pin from the V
MOSFET should be used to isolate the V
t
CLR
(1)
Tamper detect timing
Pushbutton
Tamper RAM clear ext delay
V
CLRD
Reset
IN
Regulator
Tamper clear timing
Inhibit
5V
(min) = 0.5 ms.
Parameter
V
CC
OUT
V
EX
SCL
WDI
RSTIN1
RSTIN2
PFI
PFI
V
TP1
TP2
V
CC
SS
BAT
pin from the negative voltage generated by the inverting charge pump.
1
2
IN
IN
M41ST87Y/W
Doc ID 9497 Rev 9
CLRPW
IRQ/OUT
SQW/FT
X
TP
1
0
0
1
1
PFO
PFO
E
V
SDA
RST
F
CON
OUT
CLR
32k
1
2
CLRPW
OUT
X
0
0
1
0
1
CAP+ CAP–
SHDN
IN
Inverting
Charge
negative, a p-channel enhancement mode
Pump
To RST
To LED Display
To NMI
To INT
To 32kHz
OUT
1.0
(2)
Min
(2)
OUT
Negative Output
(1)
of the M41ST87.
(–1 x V IN )
Typ
V
E
1.5
16
CC
1
4
8
Low-Power
SRAM
AI07804
Operating modes
Max
2.0
Unit
ms
s
s
s
s
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