ISL12027IB27AZ Intersil, ISL12027IB27AZ Datasheet

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... Other Industrial/Medical/Automotive CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 Trademark of Philips. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL12027 FN8232.4 | Intersil (and design registered trademark of Intersil Americas Inc. ...

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... Ordering Information PART NUMBER (Note) PART MARKING ISL12027IB27Z 12027IB27Z ISL12027IB27AZ 12027IB27AZ ISL12027IB30AZ 12027IB30AZ ISL12027IBZ 12027IBZ ISL12027IBAZ 12027IBAZ ISL12027IV27Z 2027I27Z ISL12027IV27AZ 202727AZ ISL12027IV30AZ 202730AZ ISL12027IVZ 2027IVZ ISL12027IVAZ 2027IVAZ NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

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Pin Descriptions PIN NUMBER SOIC TSSOP SYMBOL The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external 32.768kHz quartz crystal. X1 can also be driven ...

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Absolute Maximum Ratings Voltage SCL, SDA, and RESET pins DD BAT (respect to ground ...

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Watchdog Timer/Low Voltage Reset Parameters SYMBOL PARAMETER t V Detect to RESET LOW RPD DD t Power-up Reset Time-Out Delay PURST V Minimum V for Valid RESET RVALID DD Output V ISL12027-4.5A Reset Voltage Level RESET ISL12027 Reset Voltage Level ...

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Serial Interface (I C) Specifications SYMBOL PARAMETER t START Condition Setup Time SU:STA t START Condition Hold Time HD:STA t Input Data Setup Time SU:DAT t Input Data Hold Time HD:DAT t STOP Condition Setup Time SU:STO t STOP ...

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Timing Diagrams SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) SCL 8TH BIT OF LAST BYTE SDA t RSP SCL SDA RESET START Note: All inputs are ignored during the active reset period (t V RESET V ...

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Typical Performance Curves 4.00 BSW = 3.50 SCL,SDA pullups = 0V 3.00 2.50 2.00 1.50 SCL,SDA pullups = Vbat 1.00 0.50 BSW = 0.00 1.8 2.3 2.8 3.3 3.8 Vbat (V) FIGURE 5. I ...

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Description The ISL12027 device is a Real Time Clock with clock/ calendar, two polled alarms with integrated 512x8 EEPROM configured in 16 Byte per page format, oscillator compensation, CPU Supervisor (Power on Reset, Low Voltage Sensing and Watchdog Timer) and ...

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... For example, a >20ppm frequency deviation translates into an accuracy of >1 minute per month. These parameters are available from the crystal manufacturer. Intersil’s RTC family provides on- chip crystal compensation networks to adjust load- capacitance to tune oscillator frequency from -34ppm to +80ppm when using a 12 ...

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DW: Day of the Week Register This register provides a Day of the Week status and uses three bits DY2 to DY0 to represent the seven days of the week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1- 2-… The assignment ...

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TABLE 2. CLOCK/CONTROL MEMORY MAP (Shaded cells indicate that NO other value written to that bit. X indicates the bits are set REG ADDR. TYPE NAME 7 003F Status SR BAT 0037 RTC Y2K 0 (SRAM) 0036 ...

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The partitions are described in Table 3. TABLE 3. PROTECTED ADDRESSES ISL12027 None (Default 180 – 1FF 100 ...

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BSW: Power Control Bit The Power Control bit, BSW, determines the conditions for switching between V and Back Up Battery. There are two DD options. Option 1. Standard: Set “BSW = 0” Option 2. Legacy /Default Mode: Set “BSW = ...

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... Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power an Intersil RTC device for years. Another option is to use a SuperCap for applications where V for month. See the Applications Section for more information ...

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BATTERY BACKUP MODE BAT V TRIP V TRIP FIGURE 14. BATTERY SWITCHOVER WHEN V OPTION 2 -LEGACY POWER CONTROL MODE (DEFAULT) The Legacy Mode follows conditions set in X1226 products. In this mode, switching from V to ...

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When the LVR signal is active, unless the part has been , switched into the battery mode the completion of an in- progress non-volatile write cycle is unaffected, allowing a non-volatile write to continue as long as possible (down to ...

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SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER FIGURE 18. ACKNOWLEDGE RESPONSE FROM RECEIVER Device Addressing Following a start condition, the master must output a Slave Address Byte. The first four bits of the Slave Address Byte ...

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Write Operations Byte Write For a write operation, the device requires the Slave Address Byte and the Word Address Bytes. This gives the master access to any one of the words in the array or CCR. (Note: Prior to writing ...

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BYTES ADDRESS = 5 ADDRESS POINTER ENDS AT ADDR = 5 FIGURE 21. WRITING 12 BYTES TO A 16-BYTE MEMORY PAGE STARTING AT ADDRESS SIGNALS FROM A THE MASTER R SLAVE T ADDRESS SDA BUS 1 ...

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Byte load completed by issuing STOP. Enter ACK Polling Issue START Issue Memory Array Slave Address Byte AFh (Read) or AEh (Write) NO ACK returned? YES NO non-volatile write Cycle complete. Continue command sequence? YES Continue normal Read or Write ...

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... In addition to the analog compensation afforded by the adjustable load capacitance, a digital compensation feature is available for the Intersil RTC family. There are three bits known as the Digital Trimming Register or DTR, and they operate by adding or skipping pulses in the clock signal. The range provided is ±30ppm in increments of 10ppm. The default setting is 0ppm ...

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... FIGURE 27. SUGGESTED LAYOUT FOR INTERSIL RTC IN SO-8 The X1 and X2 connections to the crystal are to be kept as short as possible. A thick ground trace around the crystal is advised to minimize noise intrusion, but ground near the X1 and X2 pins should be avoided as it will add to the load capacitance at those pins ...

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... Backup Battery Operation Many types of batteries can be used with the Intersil RTC products. 3.0V or 3.6V Lithium batteries are appropriate, and sizes are available that can power a Intersil RTC device for years. Another option is to use a supercapacitor for applications where V may disappear intermittently for DD short periods of time ...

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TABLE RESET, AND BATTERY BACKUP OPERATION SUMMARY (Shaded Row is same as X12028 operation) VBAT SBIB BSW SWITCHOVER MODE BIT BIT VOLTAGE Standard Mode 2.2V TRIP typ ...

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V (3.0V) BAT V DD (2.63V) V RESET V TRIP (2.2V) RESET I BAT Alarm Operation Examples Below are examples of both Single Event and periodic Interrupt Mode alarms. Example 1 – Alarm 0 set with single interrupt (IM=”0”) A ...

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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...

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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...