CS5526-BSZ Cirrus Logic Inc, CS5526-BSZ Datasheet - Page 6

• Manufacturer Part Number: CS5526-BSZ
• Description: IC ADC 20BIT W/4BIT LATCH 20SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5526-BSZ

• Number Of Converters: 1
• Package / Case: 20-SSOP
• Number Of Bits: 20
• Data Interface: Serial
• Power Dissipation (max): 12.7mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 3.76 SPs to 616 SPs
• Resolution: 20 bit
• Input Type: Voltage
• Interface Type: Serial (3-Wire)
• Voltage Reference: 2.5 V
• Supply Voltage (max): 5 V
• Supply Voltage (min): 25 mV
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 25 mV to 5 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1014 - EVAL BOARD FOR CS5526
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1108-5

SWITCHING CHARACTERISTICS
Input Levels: Logic 0 = 0 V, Logic 1 = VD+; C
Notes: 19. Device parameters are specified with a 32.768 kHz clock; however, clocks up to 100 kHz can be used
6
Master Clock Frequency
Master Clock Duty Cycle
Rise Times
Fall Times
Start-up
Oscillator Start-up Time
Power-on Reset Period
Serial Port Timing
Serial Clock Frequency
SCLK Falling to CS Falling for continuous running SCLK
Serial Clock
SDI Write Timing
CS Enable to Valid Latch Clock
Data Set-up Time prior to SCLK rising
Data Hold Time After SCLK Rising
SCLK Falling Prior to CS Disable
SDO Read Timing
CS to Data Valid
SCLK Falling to New Data Bit
CS Rising to SDO Hi-Z
20. Specified using 10% and 90% points on waveform of interest. Output loaded with 50 pF.
21. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
22. Applicable when SCLK is continuously running.
for increased throughput.
external clock source.
Parameter
XTAL = 32.768 kHz
Any Digital Input Except SCLK
Any Digital Input Except SCLK
Any Digital Output
Any Digital Output
Pulse Width High
Pulse Width Low
L
External Clock
= 50 pF.))
Internal Clock
(T
(Note 19)
(Note 20)
(Note 20)
(Note 21)
(Note 22)
A
= 25 °C; VA+ = 5 V ±5%; VD+ = 3.0 V ±10% or 5 V ±5%;
SCLK
SCLK
Symbol
SCLK
XIN
t
t
t
t
rise
por
fall
ost
t
t
t
t
t
t
t
t
t
t
0
1
2
3
4
5
6
7
8
9
Min
100
250
250
100
100
30
30
40
50
50
0
-
-
-
-
-
-
-
-
-
-
-
32.768
32.768
CS5525 CS5526
1003
Typ
500
50
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
100
100
100
150
150
150
1.0
1.0
36
60
2
-
-
-
-
-
-
-
-
-
-
-
DS202F5
cycles
MHz
Unit
kHz
XIN
ms
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%