LTC2259CUJ-14#PBF Linear Technology, LTC2259CUJ-14#PBF Datasheet - Page 7

IC ADC 14-BIT 80MSPS 40-QFN

LTC2259CUJ-14#PBF

Manufacturer Part Number
LTC2259CUJ-14#PBF
Description
IC ADC 14-BIT 80MSPS 40-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2259CUJ-14#PBF

Number Of Bits
14
Sampling Rate (per Second)
80M
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
105mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC2259CUJ-14#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
SYMBOL
Digital Data Outputs (LVDS Mode)
t
t
t
SPI Port Timing (Note 8)
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above V
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above V
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.
Note 5: V
105MHz (LTC2260), or 80MHz (LTC2259), LVDS outputs with internal
TIMING CHARACTERISTICS
TIMING DIAGRAMS
range, otherwise specifi cations are at T
D
C
SKEW
SCK
S
H
DS
DH
DO
DD
PARAMETER
ENC to Data Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Pipeline Latency
SCK Period
CS to SCK Setup Time
SCK to CS Setup Time
SDI Setup Time
SDI Hold Time
SCK Falling to SDO Valid
= OV
DD
= 1.8V, f
SAMPLE
D0-D13, OF
CLKOUT
CLKOUT
ANALOG
INPUT
ENC
ENC
= 125MHz (LTC2261),
+
+
DD
A
All Outputs Are Single Ended and Have CMOS Levels
= 25°C. (Note 5)
N
without latchup.
t
H
CONDITIONS
C
C
t
Write Mode
Readback Mode, C
Readback Mode, C
D
L
L
t
t
t
AP
D
C
– t
N – 5
= 5pF (Note 8)
= 5pF (Note 8)
Full-Rate CMOS Output Mode Timing
C
t
(Note 8)
L
The
N + 1
l
DD
denotes the specifi cations which apply over the full operating temperature
, they
SDO
SDO
N – 4
DD
= 20pF , R
= 20pF , R
N + 2
termination disabled, differential ENC
range = 2V
Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
best fi t straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 7: Offset error is the offset voltage measured from –0.5 LSB when
the output code fl ickers between 00 0000 0000 0000 and 11 1111 1111
1111 in 2’s complement output mode.
Note 8: Guaranteed by design, not subject to test.
Note 9: V
or 80MHz (LTC2259), ENC
input range = 2V
unless otherwise noted.
Note 10: Recommended operating conditions.
PULLUP
PULLUP
N – 3
DD
LTC2260-14/LTC2259-14
P-P
= 2k
= 2k
= 1.8V, f
N + 3
with differential drive, unless otherwise noted.
P-P
l
l
l
l
l
l
l
l
l
l
with differential drive, 5pF load on each digital output
SAMPLE
N – 2
+
= single-ended 1.8V square wave, ENC
MIN
250
= 125MHz (LTC2261), 105MHz (LTC2260),
1.1
N + 4
40
1
0
5
5
5
5
226114 TD01
N – 1
+
/ENC
TYP
1.8
1.5
0.3
5.5
LTC2261-14
= 2V
P-P
sine wave, input
MAX
125
3.2
2.7
0.6
226114fa
= 0V,
UNITS
Cycles
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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