ADC1006S070H/C1,55 NXP Semiconductors, ADC1006S070H/C1,55 Datasheet
ADC1006S070H/C1,55
Specifications of ADC1006S070H/C1,55
935286647551
ADC1006S070H/C1
ADC1006S070H/C1-S
ADC1006S070H/C1-S
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ADC1006S070H/C1,55 Summary of contents
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ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz Rev. 02 — 12 August 2008 1. General description The ADC1006S055/070 are a family of Bipolar CMOS (BiCMOS) 10-bit Analog-to-Digital Converters (ADC) optimized for a wide range of ...
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... NXP Semiconductors I Barcode scanner I Cable Modem Termination System (CMTS)/Data Over Cable Service Interface Specification (DOCSIS) 4. Quick reference data Table V44 and V41 to V40 = 4. 5. CCA V15 to V17 = 4. 5. together I(cm and C amb Symbol V CCA V CCD V CCO I CCA I CCD I CCO ...
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... NXP Semiconductors 6. Block diagram n.c. FSREF VREF sample - and - hold INN CMADC DEC Fig 1. Block diagram ADC1006S055_070_2 Product data sheet CLKN CCA1 CCA3 CCA4 10, 13, 14, 16, 31 VREF REFERENCE 11 AMP ANALOG-TO-DIGITAL 43 CONVERTER CMADC REFERENCE 5 ADC1006S055/070 AGND1 AGND3 AGND4 Rev. 02 — 12 August 2008 ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. Pin configuration 7.2 Pin description Table 3. Symbol CMADC V CCA1 V CCA3 AGND3 DEC n.c. n.c. n.c. n.c. n.c. VREF FSREF n.c. n.c. V CCD2 n.c. DGND2 ADC1006S055_070_2 Product data sheet CMADC CCA1 3 V CCA3 4 AGND3 ...
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... NXP Semiconductors Table 3. Symbol OTC n.c. n.c. V CCO OGND CLKN CLK V CCD1 DGND1 SH AGND4 V CCA4 IN INN AGND1 8. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V CCA V CCD V CCO i(IN) V i(INN) ADC1006S055_070_2 Product data sheet Pin description … ...
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... NXP Semiconductors Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V i(clk)(p- stg T amb T j [1] The supply voltages V the supply voltage differences V 9. Thermal characteristics Table 5. Symbol R th(j-a) 10. Characteristics Table 6. Characteristics V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter V HIGH-level input IH voltage I LOW-level input IL current I HIGH-level input IH current ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter Voltage controlled regulator output FSREF V reference output O(ref) voltage ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter Harmonics second harmonic 2H level third harmonic level ADC1006S055H (f 3H ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter [6] Signal-to-noise ratio S/N signal-to-noise ratio ADC1006S055H (f Spurious free dynamic range; see ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter [9] Timing ( pF sampling delay time d(s) t output hold time h(o) ...
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... NXP Semiconductors 11. Additional information relating to Table 7. Code Underfl 511 1022 1023 Overflow [1] Two’s complement reference is inverted MSB. Table 8. OTC 0 1 [ don’t care. Table ADC1006S055_070_2 Product data sheet Table 6 Output coding with differential inputs (typical values to AGND); ...
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... NXP Semiconductors Fig 3. Timing diagram (1) frequency on pin CE = 100 kHz. Fig 4. Timing diagram and test conditions of 3-state output delay time ADC1006S055_070_2 Product data sheet sample N sample w(clk)H t w(clk)L CLK sample N sample d(s) DATA DATA DATA CCD output data t dLZ HIGH output data ...
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... NXP Semiconductors 9.70 ENOB (bit) 9.60 (1) 9.50 (2) 9.40 9. (1) 55 MHz. (2) 70 MHz. Fig 5. Effective Number Of Bits (ENOB function of input frequency (sample device) 73 SFDR (dB (1) 55 MHz. (2) 70 MHz. Fig 7. Spurious Free Dynamic Range (SFDR function of input frequency (sample device) ADC1006S055_070_2 Product data sheet ...
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... NXP Semiconductors 0 power spectrum (dB 120 160 0 5 Fig 9. Single-tone MHz power spectrum (dB 120 160 0 5 Fig 10. Two-tone MHz ADC1006S055_070_2 Product data sheet MHz clk 20.1 MHz MHz i clk Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 014aaa448 20 25 ...
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... NXP Semiconductors 1.00 output range (INL) 0.60 0.20 0.20 0.60 0 Fig 11. Integral Non-Linearity (INL) 0.30 DNL (LSB) 0.20 0.10 0 0.10 0.20 0 Fig 12. Differential Non-Linearity (DNL) ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz 256 512 256 512 Rev. 02 — 12 August 2008 ...
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... NXP Semiconductors 80 SFDR (dBFS ( 4.43 MHz MHz. i (3) SFDR = 80 dB. Fig 13. SFDR as a function of input amplitude SFDR (dBFS) 60 (1) 40 ( 4.43 MHz MHz. i (3) SFDR = 80 dB. Fig 14. SFDR as a function of input amplitude; V ADC1006S055_070_2 Product data sheet (1) (2) ( i(IN)(p-p) i(INN)(p-p) ...
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... NXP Semiconductors 75 (dB 1.3 1.4 1.5 1.6 1.7 1 CCA VREF (1) SFDR. (2) ENOB. (3) S/N. Fig 15. SFDR, ENOB and S function MHz; f CCA VREF clk ADC1006S055_070_2 Product data sheet 10.0 (bit) V I(IN)(p-p) (1) 9.5 V (2) I(INN)(p-p) (V) 9.0 8.5 (3) 8.0 7.5 7.0 6.5 6.0 1 ...
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... NXP Semiconductors 12. Application information 12.1 Application diagrams 220 nF 100 Fig 17. Application diagram Fig 18. Application diagram for differential clock input PECL compatible using a TTL to ADC1006S055_070_2 Product data sheet 100 INN 100 100 nF 5 n.c. 6 n.c. 7 n.c. 8 n.c. 9 n.c. 10 VREF n.c. The analog, digital and output supplies should be separated and decoupled. ...
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... NXP Semiconductors Fig 19. Application diagram for TTL single-ended clock ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz CLKN ADC1006S 055/070 CLK TTL input 014aaa459 Rev. 02 — 12 August 2008 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 12.2 Demonstration board B11 CLK2 330 C13 100 nF R3 100 J3 CLK1 CLK1 C19 CCD V CCA S5 C17 TR1 CMADC J1 220 100 100 MCLT1_6T_KK81 C8 S1 330 BYD17G GND close to TR1 pin. Fig 20. Demonstration board schematic ADC1006S055_070_2 Product data sheet C15 ...
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... NXP Semiconductors Fig 21. Component placement (top side) Fig 22. Component placement (underside) ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz TR1 R9 C7 FL4 C10 B7 IC1 TM3 C11 TP2 FL3 C13 C19 C16 C15 FL1 C17 C18 Rev. 02 — 12 August 2008 ...
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... NXP Semiconductors Fig 23. Printed-circuit board layout (top layer) Fig 24. Printed-circuit board layout (ground layer) ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 1 2 Rev. 02 — 12 August 2008 014aaa461 014aaa462 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors Fig 25. Printed-circuit board layout (power plane) 12.3 Alternative parts The following alternative parts are also available: Table 10. Type number ADC1206S040 ADC1206S055 ADC1206S070 [1] Pin to pin compatible 12.4 Recommended companion chip The recommended companion chip is the TDA9901 wideband differential digital controlled variable gain amplifi ...
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... NXP Semiconductors 13. Support information 13.1 Definitions 13.1.1 Non-linearities 13.1.1.1 Integral Non-Linearity (INL defined as the deviation of the transfer function from a best fit straight line (linear regression computation). The INL of the code i is obtained from the equation: INL i where slope of the ideal straight line = code width code value. ...
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... NXP Semiconductors Remark: In the following equations, P effects of random noise, non-linearities, sampling time errors, and ‘quantization noise’. 13.1.2.1 Signal-to-Noise And Distortion (SINAD) The ratio of the output signal power to the noise and distortion power for a given sample rate and input frequency, excluding the DC component: SINAD dB 13 ...
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... NXP Semiconductors 13.1.3 Intermodulation distortion 13.1.3.1 Spectral analysis (dual-tone) magnitude Fig 27. Spectral analysis (dual-tone) From a dual-tone input sinusoid (f the coherence criterion), the intermodulation distortion products IMD2 and IMD3 (respectively, 2nd and 3rd-order components) are defined, as follows. 13.1.3.2 IMD2 (IMD3) The ratio of the RMS value of either tone to the RMS value of the worst second (third) order intermodulation product ...
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... NXP Semiconductors 14. Package outline QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.85 mm 2.1 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE ...
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... NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date ADC1006S055_070_2 20080812 • Modifications: Corrections made to titles in • Corrections made to note in ADC1006S055_070_1 20080611 ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz Data sheet status Change notice Product data sheet ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Thermal characteristics Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 Additional information relating to 12 Application information 12.1 Application diagrams ...