AD9265BCPZ-80 Analog Devices Inc, AD9265BCPZ-80 Datasheet - Page 14

IC ADC 16BIT 80MSPS 48LFCSP

AD9265BCPZ-80

Manufacturer Part Number
AD9265BCPZ-80
Description
IC ADC 16BIT 80MSPS 48LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9265BCPZ-80

Data Interface
Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
80M
Number Of Converters
1
Power Dissipation (max)
258mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Resolution (bits)
16bit
Sampling Rate
80MSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
1.7V To 1.9V
Supply Voltage Range - Digital
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9265BCPZ-80
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9265
Pin No.
22
21
24
23
26
25
28
27
8
7
SPI Control
31
30
32
ADC Configuration
6
35
41
44
48
Mnemonic
D10/11+
D10/11−
D12/13+
D12/13−
D14/15+
D14/15−
OR+
OR−
DCO+
DCO−
SCLK/DFS
SDIO/DCS
CSB
OEB
DITHER
LVDS_RS
LVDS
PDWN
Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/output
Input
Input
Input
Input
Input
Input
Description
LVDS Output Data Bit 10/Bit 11—True.
LVDS Output Data Bit 10/Bit 11—Complement.
LVDS Output Data Bit 12/Bit 13—True.
LVDS Output Data Bit 12/Bit 13—Complement.
LVDS Output Data Bit 14/Bit 15 (MSB)—True.
LVDS Output Data Bit 14/Bit 15 (MSB)—Complement.
LVDS Overrange Output—True.
LVDS Overrange Output—Complement.
LVDS Data Clock Output—True.
LVDS Data Clock Output—Complement.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
SPI Chip Select (Active Low).
Output Enable Input (Active Low).
In external pin mode, this pin sets dither to on (active high). Pull low for control via SPI
in SPI mode.
In external pin mode, this pin sets LVDS reduced swing output mode (active high). Pull
low for control via SPI in SPI mode.
In external pin mode, this pin sets LVDS output mode (active high). Pull low for control
via SPI in SPI mode.
Power-Down Input in External Pin Mode. In SPI mode, this input can be configured as
power-down or standby.
Rev. A | Page 14 of 44

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