MAX1003CAX+ Maxim Integrated Products, MAX1003CAX+ Datasheet - Page 5

• Manufacturer Part Number: MAX1003CAX+
• Description: IC ADC 6BIT 90MSPS DL 36-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1003CAX+

• Number Of Bits: 6
• Sampling Rate (per Second): 90M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 941mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 36-BSOP (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX1003 contains two 6-bit analog-to-digital con-
verters (ADCs), a buffered voltage reference, and oscil-
lator circuitry. The ADCs use a flash conversion
technique to convert an analog input signal into a 6-bit
parallel digital output code. The MAX1003’s unique
design includes 63 fully differential comparators and a
proprietary encoding scheme that ensures no more
than 1LSB dynamic encoding error. The control logic
interfaces easily to most digital signal processors
(DSPs) and microprocessors (µPs) with +3.3V CMOS-
compatible logic interfaces. Figure 1 shows the
MAX1003 in a typical application.
______________________________________________________________Pin Description
_______________Detailed Description
7, 11, 12,
18, 19
20–25
26, 28
30–35
PIN
10
13
14
15
16
17
27
29
36
1
2
3
4
5
6
8
9
DQ5–DQ0
QOCC+
DI0–DI5
QOCC-
IOCC+
OGND
NAME
IOCC-
TNK+
DCLK
QIN+
V
GAIN
TNK-
GND
QIN-
IIN+
V
V
V
V
IIN-
CCO
CC
CC
CC
CC
_______________________________________________________________________________________
Gain-Select Input. Sets input full-scale range: 125/250/500mVp-p (Table 1).
Positive I-Channel Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled
inputs. Ground for DC-coupled inputs.
Negative I-Channel Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled
inputs. Ground for DC-coupled inputs.
I-Channel Noninverting Analog Input
I-Channel Inverting Analog Input
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 7).
Analog Ground
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 11).
Positive Oscillator/Clock Input
Negative Oscillator/Clock Input
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 12).
Q-Channel Inverting Analog Input
Q-Channel Noninverting Analog Input
Negative Q-Channel Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled
inputs. Ground for DC-coupled inputs.
Positive Q-Channel Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled
inputs. Ground for DC-coupled inputs.
Q-Channel Digital Outputs 0–5. DQ5 is the most significant bit (MSB).
Digital Output Supply, +3.3V ±300mV. Bypass each with a 47pF capacitor to OGND (pin 27).
Digital Output Ground
Digital Clock Output. Frames the output data.
I-Channel Digital Outputs 0–5. DI5 is the most significant bit (MSB).
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 19).
Converter Operation
Low-Power, 90Msps, Dual 6-Bit ADC
The MAX1003 has two (I and Q) programmable-gain
input amplifiers with a -0.5dB bandwidth of 55MHz and
true differential inputs. To maximize performance in
high-speed systems, each amplifier has less than 5pF
of input capacitance. The input amplifier gain is pro-
grammed, via the GAIN pin, to provide three possible
input full-scale ranges (FSRs) as shown in Table 1.
Table 1. Input Amplifier Programming
FUNCTION
GAIN
Open
GND
V
CC
Programmable Input Amplifiers
INPUT FULL-SCALE RANGE
(mVp-p)
500
250
125
5