LTC2435-1CGN Linear Technology, LTC2435-1CGN Datasheet - Page 27

• Manufacturer Part Number: LTC2435-1CGN
• Description: IC ADC DIFF I/REF 20BIT 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC2435-1CGN

• Number Of Bits: 20
• Sampling Rate (per Second): 13.75
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
tance driving IN
oscillator with a frequency f
clock operation), the typical differential input resistance is
3.3 • 10
driving IN
gain error. The effect of the source resistance on the two
input pins is additive with respect to this gain error. The
typical +FS and –FS errors as a function of the sum of the
source resistance seen by IN
C
In addition to this gain error, an offset error term may also
appear. The offset error is proportional to the mismatch
between the source impedance driving the two input pins
IN
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
values, it is advisable to carefully match the source imped-
ance seen by the IN
(internal oscillator and 60Hz notch), every 1Ω mismatch
in source impedance transforms a full-scale common
mode input signal into a differential mode input signal of
0.023ppm. When F
IN
+
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
and IN
are shown in Figures 18 and 19.
0
0
Figure 18. +FS Error vs R
at IN
V
V
V
V
V
F
T
O
A
CC
REF +
REF
IN +
IN –
12
= GND
= 25°C
+
= 5V
+
–
–
= 3.75V
= 1.25V
/f
or IN
400
= 5V
= GND
or IN
and with the difference between the input and
EOSC
+
–
–
Ω and each ohm of source resistance
800
R
(Large C
or IN
will result in 0.15 • 10
C
SOURCE
IN
O
U
= 1μF, 10μF
= HIGH (internal oscillator and 50Hz
+
C
–
IN
1200
(Ω)
. When F
and IN
= 0.01μF
IN
)
U
SOURCE
C
1600
+
IN
EOSC
and IN
–
= 0.1μF
O
2435 F18
pins. When F
is driven by an external
2000
W
(external conversion
–
–6
for large values of
• f
EOSC
100
90
80
70
60
50
40
30
20
10
0
IN
Figure 19. –FS Error vs R
0
at IN
O
U
V
V
V
V
V
F
T
capacitor
ppm +FS
O
A
CC
REF
REF
IN
IN
= GND
= 25°C
+
–
= LOW
= 5V
+
+
–
= 1.25V
= 3.75V
400
= 5V
= GND
or IN
C
IN
= 1μF, 10μF
–
800
R
(Large C
SOURCE
notch), every 1Ω mismatch in source impedance trans-
forms a full-scale common mode input signal into a
differential mode input signal of 0.02ppm. When F
driven by an external oscillator with a frequency f
every 1Ω mismatch in source impedance transforms a
full-scale common mode input signal into a differential
mode input signal of 0.15 • 10
shows the typical offset error due to input common mode
voltage for various values of source resistance imbalance
between the IN
used.
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
eliminates the offset error caused by mismatched source
impedances.
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typical better than 0.5%. Such
a specification can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/°C) are
used for the external source impedance seen by IN
IN
C
1200
IN
(Ω)
–
, the expected drift of the dynamic current, offset and
= 0.1μF
IN
C
)
IN
SOURCE
1600
= 0.01μF
2435 F19
2000
+
LTC2435/LTC2435-1
and IN
Figure 20. Offset Error vs Common Mode
Voltage (V
Source Resistance Imbalance (ΔR
R
Values (C
–310
–320
–330
–340
–350
–360
–370
–380
SOURCEIN
–
pins when large C
0
0.5
IN
A: ΔR
B: ΔR
C: ΔR
D: ΔR
+ – R
1.0
INCM
–6
≥ 1μF)
V
V
V
V
CC
REF
REF
IN
IN
IN
IN
IN
1.5
• f
+
SOURCEIN
= V
= 5V
= 1k
= 500Ω
= 200Ω
+
–
= 0Ω
= V
= 5V
= GND
EOSC
2.0
IN
V
IN
INCM
–
+
= V
2.5
E: ΔR
F: ΔR
G: ΔR
= V
ppm. Figure 20
F
T
C
INCM
(V)
–) for Large C
3.0
O
A
IN
IN
IN
= GND
= 25°C
IN
IN
IN
= 10μF
–
3.5
= –500Ω
= –200Ω
= –1k
) and Input
values are
4.0
27
+
IN
EOSC
4.5
24351fb
2435 F20
O
and
=
D
G
A
B
C
E
F
IN
5.0
is
,