LTC2410CGN Linear Technology, LTC2410CGN Datasheet - Page 28

• Manufacturer Part Number: LTC2410CGN
• Description: IC ADC 24BIT DIFF INP/REF 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC2410CGN

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q894257

APPLICATIO S I FOR ATIO
LTC2410
REF
nected to these pins are shown in Figures 22, 23, 24
and 25.
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
100 of source resistance driving REF
into about 1.34ppm additional INL error. When F
(internal oscillator and 50Hz notch), every 100 of source
resistance driving REF
1.1ppm additional INL error. When F
28
Figure 24. +FS Error vs R
Figure 22. +FS Error vs R
+
and REF
O
= LOW (internal oscillator and 60Hz notch), every
–180
–270
–360
–450
–90
–10
–20
–30
–40
–50
0
0
–
0 100 200 300 400 500 600 700 800 900 1000
1
pins and external capacitance C
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
A
O
CC
CC
A
+
–
+
–
= GND
= 25 C
= GND
= 25 C
U
+
–
= 3.75V
+
= 5V
= 1.25V
–
= 5V
= 2.5V
C
= 5V
10
= 5V
= GND
C
REF
= 5V
= GND
C
REF
REF
C
SOURCE
= 0.001 F
+
REF
= 0.01 F
SOURCE
= 100pF
or REF
U
R
= 0pF
100
R
SOURCE
SOURCE
at REF
C
at REF
REF
( )
( )
1k
–
C
= 1 F, 10 F
C
REF
translates into about
+
REF
W
+
and REF
= 0.01 F
+
or REF
= 0.1 F
10k
O
or REF
is driven by an
2410 F24
2410 F22
–
–
100k
(Small C
(Large C
–
translates
U
O
REF
= HIGH
con-
IN
REF
)
)
external oscillator with a frequency f
source resistance driving REF
about 8.73 • 10
Figure 26 shows the typical INL error due to the source
resistance driving the REF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF
and REF
user is thus advised to minimize the combined source
impedance driving the REF
try to match it.
Figure 25. –FS Error vs R
Figure 23. –FS Error vs R
–
pins does not help the gain or the INL error. The
450
360
270
180
50
40
30
20
10
90
0
0
1
0 100 200 300 400 500 600 700 800 900 1000
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
–6
O
A
O
A
CC
CC
+
–
+
–
= GND
= 25 C
= GND
= 25 C
+
= GND
+
–
= 1.25V
C
–
= 2.5V
= 3.75V
= 5V
= 5V
C
10
REF
= 5V
= GND
= 5V
= GND
• f
C
REF
REF
C
SOURCE
= 0.001 F
REF
EOSC
= 0.01 F
SOURCE
= 100pF
+
R
R
= 0pF
100
+
SOURCE
SOURCE
or REF
and REF
ppm additional INL error.
at REF
at REF
C
+
REF
( )
( )
C
1k
or REF
REF
= 1 F, 10 F
–
C
+
pins when large C
REF
= 0.01 F
+
and REF
EOSC
–
or REF
pins rather than to
10k
= 0.1 F
–
, every 100 of
2410 F23
2410 F25
translates into
–
–
100k
(Small C
(Large C
IN
REF
REF
)
)
+