LTC2402IMS Linear Technology, LTC2402IMS Datasheet - Page 8

• Manufacturer Part Number: LTC2402IMS
• Description: IC ADC 24BIT 2CH MICROPWR 10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2402IMS

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN
LTC2401/LTC2402
TYPICAL PERFOR A CE CHARACTERISTICS
V
(Pin 6) with a 10 F tantalum capacitor in parallel with
0.1 F ceramic capacitor as close to the part as possible.
FS
full-scale input value. When V
full scale (FFFFF
FS
CH0, CH1 (Pins 4, 3): Analog Input Channels. The input
voltage range is – 0.125 • V
V
absolute maximum rating of – 0.3V to V
sions are performed alternately between CH0
and CH1 for the LTC2402. Pin 4 is a No Connect (NC) on
the LTC2401.
ZS
zero-scale input value. When V
outputs zero scale (00000
GND (Pin 6): Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
8
CC
REF
SET
SET
SET
U
(Pin 1): Positive Supply Voltage. Bypass to GND
> 2.5V, the input voltage range may be limited by the
– ZS
(Pin 5): Zero-Scale Set Input. This pin defines the
(Pin 2): Full-Scale Set Input. This pin defines the
FUNCTIONS
U
SET
.
H
24
20
16
12
8
). The total reference voltage is
0
U
INL vs Output Rate
V
V
F
O
CC
REF
= EXTERNAL
= 5V
= 5V
20
H
W
).
IN
OUTPUT RATE (Hz)
REF
T
T
A
A
= FS
= 90 C
40
= 25 C
U
IN
to 1.125 • V
SET
= ZS
60
CC
, the ADC outputs
+ 0.3V. Conver-
T
SET
A
80
= –55 C
, the ADC
24012 G28
REF
100
. For
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single-point grounding system.
CS (Pin 7): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
SDO (Pin 8): Three-State Digital Output. During the data
output period, this pin is used for serial data output. When
the chip select CS is HIGH (CS = V
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
12
24
20
16
8
0
Resolution vs Output Rate
V
V
F
O
CC
REF
= EXTERNAL
= 5V
= 5V
20
OUTPUT RATE (Hz)
T
T
A
A
= 25 C
40
= 90 C
60
T
A
= –55 C
80
24012 G29
CC
), the SDO pin is in a
100