LTC2402CMS#PBF Linear Technology, LTC2402CMS#PBF Datasheet - Page 25

• Manufacturer Part Number: LTC2402CMS#PBF
• Description: IC ADC 24BIT 2CH MICROPWR 10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2402CMS#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Number Of Elements: 1
• Resolution: 24Bit
• Architecture: Delta-Sigma
• Sample Rate: 0.008KSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 6.188V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Integral Nonlinearity Error: 15ppm of Vref
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 10
• Package Type: MSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
on the offset. However, the reference current at V
is similar to the input current at full-scale. For large values
of reference capacitance (C
error shift is 0.08ppm/ of external reference resistance
independent of the capacitance at V
the capacitance tied to V
input resistance of up to 20k (20pF parasitic capacitance
at V
Unlike the analog input, the integral nonlinearity of the
device can be degraded with excessive external RC time
constants tied to the reference input. If the capacitance
REF
) may be tolerated, see Figure 23.
Figure 23. Full-Scale Error vs R
Figure 22. Full-Scale Error vs R
–25
–50
160
120
50
25
80
40
0
0
100
0
C
V
V
V
T
V
V
V
T
C
A
IN
CC
REF
IN
CC
REF
IN
A
IN
= 25 C
= 25 C
= 10 F
= 5V
= 5V
= 5V
= 5V
= 1 F
= 5V
= 5V
200
U
RESISTANCE AT V
RESISTANCE AT V
C
IN
1k
= 1000pF
C
400
REF
IN
U
= 10 F
VREF
is small (C
600
C
REF
REF
IN
10k
C
> 0.01 F), the full-scale
C
IN
= 100pF
IN
( )
( )
= 0.1 F
W
= 0.01 F
C
REF
800
VREF
VFEF
IN
= 20pF
VREF
, see Figure 22. If
24012 F23
24012 F22
(Small C)
(Large C)
100k
1000
< 0.01 F), an
U
IN
= V
REF
at node V
can tolerate large external resistances without reduction
in INL, see Figure 24. If the external capacitance is large
(C
0.04ppm/
Figure 25.
In addition to the dynamic reference current, the V
protection diodes have a temperature dependent leakage
current. This leakage current, nominally 1nA ( 10nA max),
results in a fixed full-scale shift of 10 V for a 10k source
resistance.
VREF
> 0.01 F), the linearity will be degraded by
REF
50
40
30
20
10
40
30
20
10
Figure 24. INL Error vs R
Figure 25. INL Error vs R
0
0
100
is small (C
independent of capacitance at V
0
V
V
T
C
C
V
V
T
A
CC
REF
A
IN
CC
REF
IN
= 25 C
= 25 C
= 5V
= 1000pF
= 0.01 F
= 5V
= 5V
= 5V
200
RESISTANCE AT V
RESISTANCE AT V
C
VREF
1k
C
VREF
VREF
LTC2401/LTC2402
400
= 0.01 F
= 0.1 F
< 0.01 F), the reference input
C
VREF
600
REF
= 1 F
10k
REF
C
VREF
VREF
VREF
( )
( )
C
IN
C
800
IN
= 10 F
= 100pF
(Small C)
(Large C)
= 20pF
24012 F24
24012 F25
100k
1000
REF
REF
25
, see
ESD