LTC2259CUJ-16#PBF Linear Technology, LTC2259CUJ-16#PBF Datasheet - Page 6

• Manufacturer Part Number: LTC2259CUJ-16#PBF
• Description: IC ADC 16BIT 80MSPS 40QFN
• Manufacturer: Linear Technology

Specifications of LTC2259CUJ-16#PBF

• Number Of Bits: 16
• Sampling Rate (per Second): 80M
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 201mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC2259-16
SYMBOL
f
t
t
t
Digital Data Outputs (CMOS Modes: Full Data Rate and Double-Data Rate)
t
t
t
Digital Data Outputs (LVDS Mode)
t
t
t
SPI Port Timing (Note 8)
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above V
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above V
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.
TIMING CHARACTERISTICS
6
range, otherwise specifi cations are at T
S
L
H
AP
D
C
SKEW
D
C
SKEW
SCK
S
H
DS
DH
DO
PARAMETER
Sampling Frequency
ENC Low Time (Note 8)
ENC High Time (Note 8)
Sample-and-Hold Acquisition Delay
Time
ENC to Data Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Pipeline Latency
ENC to Data Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Pipeline Latency
SCK Period
CS to SCK Setup Time
SCK to CS Setup Time
SDI Setup Time
SDI Hold Time
SCK Falling to SDO Valid
DD
A
= 25°C. (Note 5)
without latchup.
CONDITIONS
(Note 10)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
C
C
t
Full Data Rate Mode
Double-Data Rate Mode
C
C
t
Write Mode
Readback Mode, C
Readback Mode, C
D
D
L
L
L
L
– t
– t
= 5pF (Note 8)
= 5pF (Note 8)
= 5pF (Note 8)
= 5pF (Note 8)
C
C
(Note 8)
(Note 8)
The
l
DD
denotes the specifi cations which apply over the full operating temperature
, they
SDO
SDO
DD
= 20pF , R
= 20pF , R
Note 5: V
termination disabled, differential ENC
range = 2V
Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
best fi t straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 7: Offset error is the offset voltage measured from –0.5 LSB when
the output code fl ickers between 0000 0000 0000 0000 and 1111 1111
1111 1111 in 2’s complement output mode.
Note 8: Guaranteed by design, not subject to test.
Note 9: V
wave, ENC
each digital output unless otherwise noted.
Note 10: Recommended operating conditions.
PULLUP
PULLUP
DD
DD
–
P-P
= 2k
= 2k
= 0V, input range = 2V
= OV
= 1.8V, f
with differential drive, unless otherwise noted.
DD
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
= 1.8V, f
SAMPLE
MIN
5.93
2.00
5.93
2.00
250
= 80MHz, ENC
1.1
1.1
SAMPLE
40
1
1
0
1
0
5
5
5
5
P-P
= 80MHz, LVDS outputs with internal
+
with differential drive, 5pF load on
/ENC
6.25
6.25
6.25
6.25
TYP
1.7
1.4
0.3
5.0
5.5
1.8
1.5
0.3
5.5
–
+
0
= 2V
= single-ended 1.8V square
P-P
sine wave, input
MAX
500
500
500
500
125
3.1
2.6
0.6
3.2
2.7
0.6
80
UNITS
Cycles
Cycles
Cycles
225916f
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns