CS5345-CQZR Cirrus Logic Inc, CS5345-CQZR Datasheet - Page 23

• Manufacturer Part Number: CS5345-CQZR
• Description: IC ADC AUD 105DB 200KHZ 48-LQFP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5345-CQZR

• Package / Case: 48-LQFP
• Number Of Bits: 24
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Number Of Converters: 2
• Power Dissipation (max): 485mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Conversion Rate: 192 KSPs
• Resolution: 24 bit
• Number Of Adc Inputs: 6
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 10 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 3.13 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1780 - EVALUATION BOARD FOR CS5345
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

DS658F2
4. APPLICATIONS
4.1
4.2
4.2.1
LRCK
Mode
(kHz)
176.4
44.1
88.2
128
192
32
48
64
96
Recommended Power-Up Sequence
1. Hold RESET low until the power supply,MCLK, and LRCK are stable. In this state, the Control Port is
2. Bring RESET high. The device will remain in a low power state with the PDN bit set by default. The con-
3. The desired register settings can be loaded while the PDN bit remains set.
4. Clear the PDN bit to initiate the power-up sequence.
System Clocking
The CS5345 will operate at sampling frequencies from 4 kHz to 200 kHz. This range is divided into three
speed modes as shown in
Master Clock
MCLK/LRCK must maintain an integer ratio as shown in
frequency at which audio samples for each channel are clocked out of the device. The FM bits (See
tional Mode (Bits 7:6)” on page
page
clocks in Slave Mode.
LRCK frequencies.
11.2896
12.2880
8.1920
reset to its default settings.
trol port will be accessible.
64x
-
-
-
-
-
-
33.) configure the device to generate the proper clocks in Master Mode and receive the proper
12.2880
16.9344
18.4320
96x
-
-
-
-
-
-
Table 2
Single-Speed
Double-Speed
Quad-Speed
11.2896
12.2880
16.3840
22.5792
24.5760
Table
8.1920
128x
QSM
-
-
-
Table 2. Common Clock Frequencies
illustrates several standard audio sample rates and the required MCLK and
1.
32.) and the MCLK Freq bits (See
Mode
12.2880
16.9344
18.4320
24.5760
33.8680
36.8640
Table 1. Speed Modes
192x
-
-
-
MCLK (MHz)
Sampling Frequency
12.2880
16.3840
22.5792
24.5760
32.7680
45.1584
49.1520
11.2896
8.1920
256x
100-200 kHz
50-100 kHz
4-50 kHz
Table
12.2880
16.9344
18.4320
24.5760
33.8680
36.8640
384x
2. The LRCK frequency is equal to Fs, the
-
-
-
“MCLK Frequency - Address 05h” on
DSM
16.3840
22.5792
24.5760
32.7680
45.1584
49.1520
512x
-
-
-
24.5760
33.8680
36.8640
768x
-
-
-
-
-
-
SSM
CS5345
32.7680
45.1584
49.1520
1024x
“Func-
-
-
-
-
-
-
23