AD7626BCPZ Analog Devices Inc, AD7626BCPZ Datasheet - Page 5

• Manufacturer Part Number: AD7626BCPZ
• Description: IC ADC 16BIT 10MSPS DIFF 32LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD7626BCPZ

• Data Interface: Serial
• Design Resources: Single-Ended-to-Differential High Speed Drive Circuit for 16-Bit, 10 MSPS AD7626 ADC (CN0105)
• Number Of Bits: 16
• Sampling Rate (per Second): 10M
• Number Of Converters: 1
• Power Dissipation (max): 170mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Resolution (bits): 16bit
• Sampling Rate: 10MSPS
• Input Channel Type: Differential
• Supply Current: 23.5mA
• Digital Ic Case Style: CSP
• No. Of Pins: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING SPECIFICATIONS
VDD1 = 5 V; VDD2 = 2.5 V; VIO = 2.37 V to 2.63 V; REF = 4.096 V; all specifications T
Table 3.
Parameter
Time Between Conversions
CNV High Time
CNV to D (MSB) Ready
CNV to Last CLK (LSB) Delay
CLK Period
CLK Frequency
CLK to DCO Delay (Echoed-Clock Mode)
DCO to D Delay (Echoed-Clock Mode)
CLK to D Delay
1
2
The maximum time between conversions is 10,000 ns. If CNV± is left idle for a time greater than the maximum value of t
For the maximum CLK period, the window available to read data is t
frequency that can be used for a given conversion CNV frequency. In echoed-clock interface mode, n = 16; in self-clocked interface mode, n = 18.
2
1
CYC
− t
Rev. A | Page 5 of
MSB
Symbol
t
t
t
t
t
f
t
t
t
CLK
CYC
CNVH
MSB
CLKL
CLK
DCO
D
CLKD
+ t
CLKL
. Divide this time by the number of bits (n) to be read giving the maximum CLK±
Min
100
10
3.33
0
0
MIN
Typ
4
250
4
0
4
to T
MAX
Max
10,000
40
100
72
(t
300
7
1
7
, unless otherwise noted.
CYC
CYC
, the subsequent conversion result is invalid.
− t
MSB
+ t
CLKL
)/n
AD7626
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns