AD9228BCPZ-65 Analog Devices Inc, AD9228BCPZ-65 Datasheet - Page 37

• Manufacturer Part Number: AD9228BCPZ-65
• Description: IC ADC LVDS 12BIT QUAD 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9228BCPZ-65

• Data Interface: Serial, SPI™
• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Number Of Converters: 4
• Power Dissipation (max): 510mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Resolution (bits): 12bit
• Sampling Rate: 65MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9228-65EBZ - BOARD EVAL FOR AD9228
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

EVALUATION BOARD
The AD9228 evaluation board provides all of the support cir-
cuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially using a
transformer (default) or an
driven in a single-ended fashion. Separate power pins are provided
to isolate the DUT from the drive circuitry of the AD8332. Each
input configuration can be selected by changing the connection
of various jumpers (see Figure 73 to Figure 77). Figure 71 shows
the typical bench characterization setup used to evaluate the ac
performance of the AD9228. It is critical that the signal sources
used for the analog input and clock have very low phase noise
(<1 ps rms jitter) to realize the optimum performance of the
converter. Proper filtering of the analog input signal to remove
harmonics and lower the integrated or broadband noise at the
input is also necessary to achieve the specified noise performance.
See Figure 73 to Figure 81 for the complete schematics and
layout diagrams demonstrating the routing and grounding
techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board has a wall-mountable switching power
supply that provides a 6 V, 2 A maximum output. Connect the
supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to
63 Hz. The other end of the supply is a 2.1 mm inner diameter
jack that connects to the PCB at P503. Once on the PC board,
the 6 V supply is fused and conditioned before connecting to
three low dropout linear regulators that supply the proper bias
to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
L504 to L507 can be removed to disconnect the switching
power supply. This enables the user to bias each section of the
board individually. Use P501 to connect a different supply for
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
ROHDE & SCHWARZ,
ROHDE & SCHWARZ,
2V p-p SIGNAL
SYNTHESIZER
2V p-p SIGNAL
SYNTHESIZER
SMHU,
SMHU,
SWITCHING
SUPPLY
POWER
BAND-PASS
FILTER
2A MAX
AD8332
6V DC
driver. The ADC can also be
XFMR
INPUT
CLK
–
5.0V
EVALUATION BOARD
+
AD9228
–
1.8V
+
Figure 71. Evaluation Board Connection
–
1.8V
Rev. D | Page 37 of 56
+
CH A TO CH D
–
3.3V
+
SERIAL
12-BIT
LVDS
SPI
each section. At least one 1.8 V supply is needed for AVDD_DUT
and DRVDD_DUT; however, it is recommended that separate
supplies be used for analog and digital signals and that each
supply have a current capability of 1 A. To operate the evaluation
board using the VGA option, a separate 5.0 V analog supply
(AVDD_5 V) is needed. To operate the evaluation board using
the SPI and alternate clock options, a separate 3.3 V analog
supply (AVDD_3.3 V) is needed in addition to the other
supplies.
INPUT SIGNALS
When connecting the clock and analog sources to the evaluation
board, use clean signal generators with low phase noise, such as
Rohde & Schwarz SMHU or HP8644B signal generators or the
equivalent, as well as a 1 m, shielded, RG-58, 50 Ω coaxial cable.
Enter the desired frequency and amplitude from the ADC speci-
fications tables. Typically, most Analog Devices evaluation boards
can accept approximately 2.8 V p-p or 13 dBm sine wave input
for the clock. When connecting the analog input source, it is
recommended to use a multipole, narrow-band, band-pass filter
with 50 Ω terminations. Good choices of such band-pass filters are
available from TTE, Allen Avionics, and K&L Microwave, Inc.
The filter should be connected directly to the evaluation board
if possible.
OUTPUT SIGNALS
The default setup uses the Analog Devices, Inc.,
FPGA-4/HSC-ADC-FPGA-8
to deserialize the digital output data and convert it to parallel
CMOS. These two channels interface directly with the Analog
Devices standard dual-channel FIFO data capture board
ADC-EVALB-DC). Two of the four channels can then be evaluated
at the same time. For more information on the channel settings
and optional settings of these boards, visit www.analog.com/FIFO.
DESERIALIZATION
–
HSC-ADC-FPGA-4/
HSC-ADC-FPGA-8
3.3V
HIGH SPEED
BOARD
+
SPI
PARALLEL
–
1.5V
12-BIT
CMOS
2 CH
+
HSC-ADC-EVALB-DC
high speed deserialization board
FIFO DATA
CAPTURE
CONNECTION
BOARD
–
3.3V
SPI
+
USB
HSC-ADC-
SPI
SOFTWARE
ANALYZER
RUNNING
AND SPI
AD9228
USER
ADC
PC
(HSC-