LTC1296DCSW Linear Technology, LTC1296DCSW Datasheet - Page 18

• Manufacturer Part Number: LTC1296DCSW
• Description: IC DATA ACQ SYSTEM 12BIT 20-SOIC
• Manufacturer: Linear Technology
• Type: Data Acquisition System (DAS), ADCr

Specifications of LTC1296DCSW

• Resolution (bits): 12 b
• Sampling Rate (per Second): 46.5k
• Data Interface: Serial, Parallel
• Voltage Supply Source: Dual ±
• Voltage - Supply: ±5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC1296DCS

LTC1293/LTC1294/LTC1296
Bypassing
For good performance, V
ripple. Any changes in the V
ground during a conversion cycle can induce errors or
noise in the output code. V
below 0.5mV by bypassing the V
analog ground plane with a minimum of 22µF tantalum
capacitor and with leads as short as possible. The lead
from the device to the V
minimum and the V
impedance such as obtained from a voltage regulator
(e.g., LT323A). For high frequency bypassing a 0.1µF
ceramic disk placed in parallel with the 22µF is recom-
mended. Again the leads should be kept to a minimum.
Figure 5 and 6 show the effects of good and poor V
bypassing.
18
A
LTC1294. Figure 4 shows an example of an ideal LTC1293/
4/6 ground plane design for a two sided board. Of course
this much ground plane will not always be possible, but
users should strive to get as close to this ideal as possible.
PPLICATI
GROUND
ANALOG
PLANE
Figure 4. Ground Plane for the LTC1293/4/6
O
U
TANTALUM
CC
10
S
1
2
3
4
5
6
7
8
9
22µF
supply should have a low output
CC
I FOR ATIO
U
CC
supply also should be kept to a
CC
noise and ripple can be kept
20
19
18
17
16
15
14
13
12
11
must be free of noise and
CC
voltage with respect to
V
CC
CC
W
pin directly to the
0.1µF
CERAMIC
0.1µF
CERAMIC
DISK
V
–
U
LTC1293 F04
CC
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1293/4/6
have capacitive switching input current spikes. These
current spikes settle quickly and do not cause a problem.
If large source resistances are used or if slow settling op
amps drive the inputs, take care to insure the transients
caused by the current spikes settle completely before the
conversion begins.
V
V
IN
IN
–
+
R
Figure 7. Analog Input Equivalent Circuit
R
Figure 5. Poor V
Noise and Ripple Can Cause A/D Errors.
Figure 6. Good V
and Ripple on V
SOURCE
SOURCE
+
–
HORIZONTAL: 10µs/DIV
HORIZONTAL: 10µs/DIV
C1
INPUT
INPUT
C2
“–”
“+”
CC
CC
CC
Below 1mV
Bypassing.
Bypassing Keeps Noise
6TH CLK↑
8TH CLK↓
R
ON
V
CS
CC
= 500Ω
LTC1293/4/6
C
100pF
IN
LTC1293 F07
=
129346fs