LTC1292BCN8 Linear Technology, LTC1292BCN8 Datasheet - Page 17
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LTC1292BCN8
Manufacturer Part Number
LTC1292BCN8
Description
IC DATA ACQ SYSTEM 12BIT 8-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet
1.LTC1292DCN8PBF.pdf
(24 pages)
Specifications of LTC1292BCN8
Resolution (bits)
12 b
Sampling Rate (per Second)
60k
Data Interface
Serial, Parallel
Voltage Supply Source
Single Supply
Voltage - Supply
5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1292BCN8
Manufacturer:
LT
Quantity:
354
A
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 15. For large values of C
capacitive input switching currents are averaged into a net
DC current. A filter should be chosen with a small resistor
and large capacitor to prevent DC drops across the resistor.
The magnitude of the DC current is approximately I
100pF V
running the LTC1292(LTC1297) at the minimum cycle
time of 16.5 s (20 s), the input current equals 30 A
(25 A) at V
cause 0.1LSB of full scale error. If a large filter resistor
must be used, errors can be reduced by increasing the
cycle time as shown in the typical performance
characteristics curve Maximum Filter Resistor vs Cycle
Time.
Input Leakage Current
Input leakage currents also can create errors if the source
resistance gets too large. For example, the maximum input
leakage specification of 1 A flowing through a source
resistance of 1k will cause a voltage drop of 1mV or
0.8LSB. This error will be much reduced at lower
temperatures because leakage drops rapidly (see typical
performance characteristics curve Input Channel Leakage
Current vs Temperature).
SAMPLE-AND-HOLD
Single-Ended Input
The LTC1292/LTC1297 provide a built-in sample-and-
hold (S&H) function on the +IN input for signals acquired
in the single-ended mode (–IN pin grounded). The sample-
and-hold allows the LTC1292/LTC1297 to convert rapidly
varying signals (see typical performance characteristics
PPLICATI
IN
IN
/t
V
CYC
IN
= 5V. Here a filter resistor of 4 (5 ) will
Figure 15. RC Input Filtering
R
O
and is roughly proportional to V
FILTER
U
S
I
DC
I FOR ATIO
C
U
FILTER
“+”
“–”
LTC1292
LTC1297
W
LTC1292/7 F15
F
(e.g., 1 F) the
U
IN
. When
DC
=
curve of S&H Acquisition Time vs Source Resistance). The
input voltage is sampled during the t
in Figure 11. The sampling interval begins at the rising
edge of CS for the LTC1292, and at the falling edge of CS
for the LTC1297, and continues until the falling edge of the
CLK before the conversion begins. On this falling edge the
S&H goes into the hold mode and the conversion begins.
Differential Input
With a differential input the A/D no longer converts a single
voltage but converts the difference between two voltages.
The voltage on the +IN pin is sampled and held and can be
rapidly time-varying as in single-ended mode. The voltage
on the –IN pin must remain constant and be free of noise
and ripple throughout the conversion time. Otherwise the
differencing operation will not be done accurately. The
conversion time is 12 CLK cycles. Therefore a change in
the –IN input voltage during this interval can cause
conversion errors. For a sinusoidal voltage on the –IN
input this error would be:
Where f
V
CLK. Usually V
signal on the –IN input to generate a 0.25LSB error
(300 V) with the converter running at CLK = 1MHz, its
peak value would have to be 66mV. Rearranging the above
equation the maximum sinusoidal signal that can be
digitized to a given accuracy is given as:
For 0.25LSB error (300 V) the maximum input sinusoid
with a 5V peak amplitude that can be digitized is 0.8Hz.
Reference Input
The voltage on the reference input of the LTC1292/
LTC1297 determine the voltage span of the A/D con-
verter. The reference input has transient capacitive
PEAK
V
f
(– )
ERROR MAX
IN MAX
is its peak amplitude and f
(–IN)
(
is the frequency of the –IN input voltage,
)
ERROR
V
ERROR MAX
2
2
will not be significant. For a 60Hz
V
f
(– )
PEAK
LTC1292/LTC1297
IN PEAK
(
V
)
CLK
f
is the frequency of the
CLK
12
f
SMPL
12
CLK
time as shown
17
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