MCP4551T-103E/MF Microchip Technology, MCP4551T-103E/MF Datasheet - Page 36
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MCP4551T-103E/MF
Manufacturer Part Number
MCP4551T-103E/MF
Description
IC DGTL POT 10K 256TAPS 8-DFN
Manufacturer
Microchip Technology
Datasheet
1.MCP4531-104EMS.pdf
(88 pages)
Specifications of MCP4551T-103E/MF
Taps
257
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-DFN
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
MCP4551T-103E/MFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4551T-103E/MF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP453X/455X/463X/465X
3.1
The HVC/A0 pin is the Address 0 input for the I
interface as well as the High Voltage Command pin. At
the device’s POR/BOR the value of the A0 address bit
is latched. This input along with the A2 and A1 pins
completes the device address. This allows up to 8
MCP45xx/46xx devices can be on a single I
During normal operation the the voltage on this pin
determines if the I
or a High Voltage command (when HVC/A0 = V
3.2
The SCL pin is the serial interfaces Serial Clock pin.
This pin is connected to the Host Controllers SCL pin.
The MCP45XX/46XX is a slave device, so it’s SCL pin
accepts only external clock signals.
3.3
The SDA pin is the serial interfaces Serial Data pin.
This pin is connected to the Host Controllers SDA pin.
The SDA pin is an open-drain N-channel driver.
3.4
The V
3.5
The terminal B pin is connected to the internal
potentiometer’s terminal B.
The potentiometer’s terminal B is the fixed connection
to the Zero Scale wiper value of the digital potentiome-
ter. This corresponds to a wiper value of 0x00 for both
7-bit and 8-bit devices.
The terminal B pin does not have a polarity relative to
the terminal W or A pins. The terminal B pin can
support both positive and negative current. The voltage
on terminal B must be between V
MCP46XX devices have two terminal B pins, one for
each resistor network.
3.6
The terminal W pin is connected to the internal potenti-
ometer’s terminal W (the wiper). The wiper terminal is
the adjustable terminal of the digital potentiometer. The
terminal W pin does not have a polarity relative to
terminals A or B pins. The terminal W pin can support
both positive and negative current. The voltage on
terminal W must be between V
MCP46XX devices have two terminal W pins, one for
each resistor network.
DS22096A-page 36
SS
High Voltage Command / Address 0
(HVC/A0)
Serial Clock (SCL)
Serial Data (SDA)
Ground (V
pin is the device ground reference.
Potentiometer Terminal B
Potentiometer Wiper (W) Terminal
2
C command is a normal command
SS
)
SS
SS
and V
and V
DD
DD
.
2
C bus.
.
IHH
).
2
C
3.7
The terminal A pin is available on the MCP4XX1
devices, and is connected to the internal potentiome-
ter’s terminal A.
The potentiometer’s terminal A is the fixed connection
to the Full-Scale wiper value of the digital potentiome-
ter. This corresponds to a wiper value of 0x100 for 8-bit
devices or 0x80 for 7-bit devices.
The terminal A pin does not have a polarity relative to
the terminal W or B pins. The terminal A pin can
support both positive and negative current. The voltage
on terminal A must be between V
The terminal A pin is not available on the MCP4XX2
devices, and the internally terminal A signal is floating.
MCP46X1 devices have two terminal A pins, one for
each resistor network.
3.8
The A2 pin is the I
with the A1 and A0 pins, up to 8 MCP45XX/46XX
devices can be on a single I
3.9
The A2 pin is the I
with the A2 and A0 pins, up to 8 MCP45XX/46XX
devices can be on a single I
3.10
The V
The input power supply is relative to V
While the device V
performance of the device may not meet the data sheet
specifications.
3.11
These pins should be either connected to V
3.12
This pad is conductively connected to the device’s sub-
strate. This pad should be tied to the same potential as
the V
used to assist as a heat sink for the device when con-
nected to a PCB heat sink.
SS
DD
pin (or left unconnected). This pad could be
Potentiometer Terminal A
Address 2 (A2)
Address 1 (A1)
Positive Power Supply Input (V
pin is the device’s positive power supply input.
No Connect (NC)
Exposed Pad (EP)
2
2
C interface’s Address 2 pin. Along
C interface’s Address 1 pin. Along
DD
© 2008 Microchip Technology Inc.
< V
2
2
min
C bus.
C bus.
(2.7V), the electrical
SS
and V
SS
.
DD
DD
.
or V
DD
SS
)
.