X9420WV14I-2.7 Intersil, X9420WV14I-2.7 Datasheet

IC DIGITAL POT 10K 64TP 14TSSOP

X9420WV14I-2.7

Manufacturer Part Number
X9420WV14I-2.7
Description
IC DIGITAL POT 10K 64TP 14TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X9420WV14I-2.7

Taps
64
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Single Digitally Controlled (XDCP™)
Potentiometer
FEATURES
• Solid-State Potentiometer
• SPI Serial Interface
• Register Oriented Format
• Power Supplies
• Low Power CMOS
• High Reliability
• 8-bytes of Nonvolatile EEPROM Memory
• 10kΩ or 2.5kΩ Resistor Arrays
• Resolution: 64 Taps Each Pot
• 14 Ld TSSOP and 16 Ld SOIC Packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
BLOCK DIAGRAM
—Direct read/write/transfer wiper positions
—Store as many as four positions per
—V
—V+ = 2.7V to 5.5V
—V– = -2.7V to -5.5V
—Standby current < 1µA
—Endurance–100,000 data changes per bit per
—Register data retention–100 years
potentiometer
register
CC
= 2.7V to 5.5V
HOLD
SCK
CS
S0
A0
SI
®
1
Interface
Circuitry
Control
Data Sheet
and
Data
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
8
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
R0 R1
R2 R3
DESCRIPTION
The X9420 integrates a single digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI bus
interface. The potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power-up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
Register
Counter
(WCR)
Wiper
All other trademarks mentioned are the property of their respective owners.
April 26, 2006
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Low Noise/Low Power/SPI Bus
V
V
V
W
L
H
/R
/R
/R
L
H
W
X9420
FN8195.1

Related parts for X9420WV14I-2.7

X9420WV14I-2.7 Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9420 FN8195.1 ...

Page 2

... X9420YV14IZ* (Note) X9420 YZI X9420WS16-2.7* X9420WS F X9420WS16Z-2.7* (Note) X9420WS ZF X9420WS16I-2.7* X9420WS G X9420WS16IZ-2.7* X9420WS ZG (Note) X9420WV14-2.7* X9420 WF X9420WV14Z-2.7* (Note) X9420 WZF X9420WV14I-2.7* X9420 WG X9420WV14IZ-2.7* X9420 WZG (Note) X9420YS16-2.7* X9420YS F X9420YS16Z-2.7* (Note) X9420YS ZF X9420YS16I-2.7* X9420YS G X9420YS16IZ-2.7* (Note) X9420YS ZG X9420YV14-2.7* X9420 YF X9420YV14Z-2.7* (Note) X9420 YZF X9420YV14I-2 ...

Page 3

PIN DESCRIPTIONS Host Interface Pins Serial Output (SO push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial ...

Page 4

PIN NAMES Symbol Description SCK Serial Clock SI, SO Serial Data A0 Device Address Potentiometer Pins (terminal equivalent Potentiometer Pins (wiper equivalent Hardware Write Protection HOLD ...

Page 5

Figure 1. Detailed Potentiometer Block Diagram Serial Data Path From Interface Circuitry Register 0 REGISTER 2 IF WCR = 00[H] THEN WCR = 3F[H] THEN Write in Process The ...

Page 6

The four high order bits of the instruction byte specify the operation. The next two bits (R one of the four registers that acted upon when a register oriented instruction is issued. The last two bits are ...

Page 7

Figure 5. Three-Byte Instruction Sequence (Write) CS SCL Figure 6. Three-Byte Instruction Sequence (Read) CS SCL Figure 7. Increment/Decrement Instruction Sequence CS SCK SI 0 ...

Page 8

Table 3. Instruction Set Instruction Read Wiper Counter 1 0 Register Write Wiper Counter 1 0 Register Read Data Register 1 0 Write Data Register 1 1 XFR Data Register Wiper Counter Register ...

Page 9

Instruction Format Notes: (1) “A1 ~ A0”: stands for the device addresses sent by the master. (2) WPx refers to wiper position data in the Wiper Counter Register “I”: stands for the increment operation, SI held HIGH during active SCK ...

Page 10

Transfer Wiper Counter Register (WCR) to Data Register (DR) device type device CS identifier addresses Falling A Edge Increment/Decrement Wiper Counter Register (WCR) device type device CS identifier addresses Falling A Edge ...

Page 11

ABSOLUTE MAXIMUM RATINGS Temperature under bias .....................- +135 C Storage temperature ..........................- +150 C Voltage on SCK, SCL or any address input with respect Voltage on V+ (referenced Voltage on ...

Page 12

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.) Symbol Parameter I V Supply Current (Active) CC1 Supply Current CC2 CC (Non-volatile Write Current (Standby Input Leakage Current LI I ...

Page 13

A.C. TEST CONDITIONS I nput pulse levels V CC Input rise and fall times 10ns Input and output timing level TIMING Symbol f SSI/SPI Clock Frequency SCK t SSI/SPI Clock Cycle Time CYC t SSI/SPI Clock High ...

Page 14

HIGH-VOLTAGE WRITE CYCLE TIMING Symbol t High-voltage Write Cycle Time (Store Instructions) WR XDCP TIMING Symbol t Wiper Response Time After The Third (Last) Power Supply Is Stable WRPO t Wiper Response Time After Instruction Issued (All Load Instructions) WRL ...

Page 15

TIMING DIAGRAMS Input Timing CS t LEAD SCK MSB SI High Impedance SO Output Timing CS SCK t V MSB SO ADDR SI Hold Timing CS SCK HOLD 15 X9420 t CYC ...

Page 16

XDCP Timing (for All Load Instructions) CS SCK MSB High Impedance SO XDCP Timing (for Increment/Decrement Instruction) CS SCK ADDR High Impedance SO Write Protect and Device Address Pins Timing ...

Page 17

APPLICATIONS INFORMATION Electronic potentiometers provide three powerful application advantages: (1) the variability and reliability of a solid- state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer ...

Page 18

Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX 0.25(0.010) E AREA E1 - 0.05(0.002) SEATING PLANE - -C- α 0.10(0.004) 0.10(0.004 NOTES: 1. These package ...

Page 19

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Related keywords