MCP4021T-502E/SN Microchip Technology, MCP4021T-502E/SN Datasheet - Page 37

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MCP4021T-502E/SN

Manufacturer Part Number
MCP4021T-502E/SN
Description
IC DGTL POT 5K 1CH 8SOIC
Manufacturer
Microchip Technology

Specifications of MCP4021T-502E/SN

Memory Type
Non-Volatile
Taps
64
Resistance (ohms)
5K
Number Of Circuits
1
Temperature Coefficient
150 ppm/°C Typical
Interface
Up/Down
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
5K
End To End Resistance
5kohm
Resistance Tolerance
± 20%
No. Of Steps
64
Supply Voltage Range
2.7V To 5.5V
Control Interface
2 Wire, Serial
No. Of Pots
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4XXXDM-DB - BOARD DAUGHTER DIGIPOT MCP4XXXMCP402XEV - BOARD EVAL FOR MCP402X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
5.2.10
This mode is achieved by keeping the U/D pin static
(either at V
V
edge of the CS pin occurs (from V
value is written to EEPROM and the WiperLock
Technology is disabled (See Figure 5-10).
FIGURE 5-10:
© 2005 Microchip Technology Inc.
IH
to V
WiperLock™ Technology
IHH
IL
WRITE WIPER SETTING TO
EEPROM AND DISABLE WiperLock
TECHNOLOGY
and then returned to V
or at V
IH
EEPROM
), while the CS pin is driven from
Write Wiper Setting to EEPROM and Disable WiperLock™ Technology.
Wiper
U/D
CS
IHH
V
IH
IH
. When the falling
to V
X
X+4
V
IH
IHH
), the wiper
To ensure that “unexpected” transitions on the U/D pin
do not cause the wiper setting to change, force the CS
pin to V
tions) after the CS pin is forced to V
After the CS pin is driven to V
serial commands are ignored until the EEPROM write
cycle (t
WC
IH
as soon as possible (within device specifica-
) completes.
t
WC
MCP4021/2/3/4
WiperLock Technology Enable
WiperLock Technology Disable
X+4
V
V
V
IH
IH
IL
IH
(from V
IHH
DS21945C-page 37
.
IHH
), all other

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