ISL22319WFU8Z-TK Intersil, ISL22319WFU8Z-TK Datasheet

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ISL22319WFU8Z-TK

Manufacturer Part Number
ISL22319WFU8Z-TK
Description
IC POT DGTL 128TP LN LP 8-MSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of ISL22319WFU8Z-TK

Taps
128
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
50 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL22319WFU8Z-TK
Manufacturer:
Intersil
Quantity:
500
Low Noise, Low Power, I
128 Taps, Wiper Only
The ISL22319 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power up the device recalls the content of the
DCP’s IVR to the WR.
The DCP can be used as a voltage divider in a wide variety
of applications including control, parameter adjustments, AC
measurement and signal processing.
Pinout
Ordering Information
ISL22319UFU8Z*
ISL22319WFU8Z*
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
2
C bus interface. The potentiometer has an associated
NUMBER
(Note)
PART
SDA
SCL
A1
A0
1
2
3
4
(8 LD MSOP)
TOP VIEW
ISL22319
319UZ
319WZ
®
1
MARKING
PART
2
Data Sheet
8
7
6
5
C
Bus,
VCC
RW
SHDN
GND
1-888-INTERSIL or 1-888-468-3774
RESISTANCE OPTION
Single Digitally Controlled Potentiometer (XDCP™)
(kΩ)
50
10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• 128 resistor taps
• I
• Non-volatile storage of wiper position
• Wiper resistance: 70Ω typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kΩ or 10kΩ total resistance
• High reliability
• 8 Ld MSOP
• Pb-free (RoHS compliant)
|
- Two address pins, up to four devices/bus
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @
September 9, 2009
2
Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
C serial interface
TEMP. RANGE
-40 to +125
-40 to +125
All other trademarks mentioned are the property of their respective owners.
(°C)
Copyright Intersil Americas Inc. 2006, 2009. All Rights Reserved
8 Ld MSOP
8 Ld MSOP
PACKAGE
(Pb-free)
ISL22319
T
+55
M8.118
M8.118
FN6310.1
°
DWG. #
C
PKG.

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ISL22319WFU8Z-TK Summary of contents

Page 1

... MARKING ISL22319UFU8Z* 319UZ ISL22319WFU8Z* 319WZ *Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). ...

Page 2

Block Diagram SCL SDA A0 INTERFACE A1 SHDN Pin Descriptions MSOP PIN SYMBOL 1 SCL 2 SDA GND 6 SHDN ISL22319 V CC POWER-UP INTERFACE CONTROL ...

Page 3

... Thermal Information Thermal Resistance (Typical, Note 1) 8 Lead MSOP +0.3 CC Maximum Junction Temperature (Plastic Package .+150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CC Recommended Operating Conditions Ambient Temperature (Extended Industrial .-40°C to +125°C V Voltage for DCP Operation . . . . . . . . . . . . . . . . . . 2.7V to 5.5V CC Wiper Current ...

Page 4

Operating Specifications Over the recommended operating conditions unless otherwise specified. SYMBOL PARAMETER I V Supply Current (volatile CC1 CC write/read) V Supply Current (volatile CC write/read, non-volatile read Supply Current (non-volatile CC2 CC write/read) V Supply Current (non-volatile ...

Page 5

Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) SYMBOL PARAMETER SERIAL INTERFACE SPECS V A1, A0, SHDN, SDA, and SCL Input IL Buffer LOW Voltage V A1, A0, SHDN, SDA, and SCL Input IH Buffer HIGH Voltage ...

Page 6

Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) SYMBOL PARAMETER Rpu SDA and SCL Bus Pull-up Resistor Off-chip t A1 and A0 Setup Time SU and A0 Hold Time HD:A NOTES: 3. Typical values are ...

Page 7

A0 and A1 Pin Timing START SCL SDA A0, A1 Typical Performance Curves 100 V = 3.3V +125º 3.3V +20º ...

Page 8

Typical Performance Curves 1.30 10k 1.10 0.90 0.70 0. 5.5V CC 0.30 0.10 50k -0.10 -0.30 -40 - TEMPERATURE (ºC) FIGURE 5. ZSerror vs TEMPERATURE 1 2.7V CC 0.5 0.0 -0 ...

Page 9

Pin Description Potentiometers Pins the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the WR register. SHDN The active low SHDN ...

Page 10

The Access Control Register (ACR) contains information and control bits described below in Table 2. The VOL bit (ACR[7]) determines whether the access is to wiper registers WR or initial value registers IVR. TABLE 2. ACCESS CONTROL REGISTER (ACR) VOL ...

Page 11

SCL FROM MASTER SDA OUTPUT FROM TRANSMITTER SDA OUTPUT FROM RECEIVER START FIGURE 13. ACKNOWLEDGE RESPONSE FROM RECEIVER SIGNALS FROM THE MASTER SIGNAL AT SDA SIGNALS FROM THE SLAVE S SIGNALS T FROM THE A IDENTIFICATION MASTER R BYTE WITH ...

Page 12

Rpu Rpu SHDN SCL SDA A0 A1 FIGURE 16. TYPICAL APPLICATION DIAGRAM FOR IMPLEMENTING ADJUSTABLE VOLTAGE REFERANCE 12 ISL22319 V CC 0.1µ 0.1µ ISL22319 R1 OUT FN6310.1 September 9, 2009 ...

Page 13

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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