ISL22326WFR16Z-TK Intersil, ISL22326WFR16Z-TK Datasheet - Page 13
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ISL22326WFR16Z-TK
Manufacturer Part Number
ISL22326WFR16Z-TK
Description
IC POT DGTL 128TP LN LP 16-QFN
Manufacturer
Intersil
Series
XDCP™r
Datasheet
1.ISL22326UFR16Z.pdf
(15 pages)
Specifications of ISL22326WFR16Z-TK
Taps
128
Resistance (ohms)
10K
Number Of Circuits
2
Temperature Coefficient
50 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL22326WFR16Z-TK
Manufacturer:
IXYS
Quantity:
12
Write Operation
A Write operation requires a START condition, followed by a
valid Identification Byte, a valid Address Byte, a Data Byte,
and a STOP condition. After each of the three bytes, the
ISL22326 responds with an ACK. At this time, the device
enters its standby state (see Figure 18). The device can
receive more than one byte of data by auto incrementing the
address after each received byte. Note after reaching the
address 08h, the internal pointer “rolls over” to address 00h.
The non-volatile write cycle starts after STOP condition is
determined and it requires up to 20ms delay for the next
non-volatile write. Thus, non-volatile registers must be
written individually.
13
ISL22326
Read Operation
A Read operation consist of a three byte instruction followed
by one or more Data Bytes (see Figure 19). The master
initiates the operation issuing the following sequence: a
START, the Identification byte with the R/W bit set to “0”, an
Address Byte, a second START, and a second Identification
byte with the R/W bit set to “1”. After each of the three bytes,
the ISL22326 responds with an ACK. Then the ISL22326
transmits Data Bytes as long as the master responds with an
ACK during the SCL cycle following the eighth bit of each
byte. The master terminates the read operation (issuing a
ACK and a STOP condition) following the last bit of the last
Data Byte (see Figure 19).
The Data Bytes are from the registers indicated by an
internal pointer. This pointer initial value is determined by the
Address Byte in the Read operation instruction, and
increments by one during transmission of each Data Byte.
After reaching the memory location 08h, the pointer “rolls
over” to 00h, and the device continues to output data for
each ACK received.
In order to read back the non-volatile IVR, it is recommended
that the application reads the ACR first to verify the WIP bit
is 0. If the WIP bit (ACR[5]) is not 0, the host should repeat
its reading sequence again.
September 8, 2009
FN6176.2