ISL95310WIU10Z-TK Intersil, ISL95310WIU10Z-TK Datasheet - Page 6

• Manufacturer Part Number: ISL95310WIU10Z-TK
• Description: IC XDCP 128-TAP 10KOHM 10-MSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of ISL95310WIU10Z-TK

• Taps: 128
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 45 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: Up/Down (3-Wire)
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 10K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A.C. Timing
Power Up and Down Requirements
In order to prevent unwanted tap position changes, or an
inadvertent store, bring the CS and INC high before or
concurrently with the V
potentiometer voltages must be applied after this sequence
is completed. During power-up, the data sheet parameters
for the DCP do not fully apply until 1ms after V
final value. The V
Pin Descriptions
R
The high (R
equivalent to the fixed terminals of a mechanical
potentiometer. The terminology of R
relative position of the terminal in relation to wiper movement
direction selected by the U/D input and not the voltage
potential on the terminal.
R
R
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
W
W
H
INC
U/D
CS
R
and R
is the wiper terminal and is equivalent to the movable
W
L
H
t
CI
) and low (R
t
IW
CC
ramp spec is always in effect.
CC
L
t
pin on power-up. The
) terminals of the ISL95310 are
IL
t
ID
6
t
CYC
L
and R
t
IH
H
references the
CC
t
DI
reaches its
t
IC
MI
(3)
ISL95310
t
CPHS
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the ISL95310 will be placed
in the low power standby mode until the device is selected
once again.
Principles of Operation
There are three sections of the ISL95310: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 127 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the potential at that
point to the wiper.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
connected to the wiper for t
R
a significant amount if the wiper is moved several positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
TOTAL
value for the device can temporarily be reduced by
t
F
90%
10%
90%
IW
(INC to V
t
R
t
W
CPHNS
change). The
May 6, 2005
FN8083.0