X9408WV24 Intersil, X9408WV24 Datasheet - Page 5
![IC DCP QUAD 10K 64TP 24TSSOP](/photos/6/65/66570/20-24-tssop_sml.jpg)
X9408WV24
Manufacturer Part Number
X9408WV24
Description
IC DCP QUAD 10K 64TP 24TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet
1.X9408WS24I.pdf
(20 pages)
Specifications of X9408WV24
Taps
64
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X9408WV24I
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
X9408WV24Z-2.7T1
Manufacturer:
INTERSIL
Quantity:
20 000
Flow 1. ACK Polling Sequence
Instruction Structure
The next byte sent to the X9408 contains the instruction and
register pointer information. The four most significant bits are
the instruction. The next four bits point to one of the two pots
and when applicable they point to one of four associated
registers. The format is shown in Figure 2.
COMMAND COMPLETED
NON-VOLATILE WRITE
ENTER ACK POLLING
ISSUE SLAVE
OPERATION?
INSTRUCTION
RETURNED?
ADDRESS
FURTHER
PROCEED
START
ISSUE
ISSUE
SDA
SCL
ACK
YES
YES
S
T
A
R
T
NO
0
NO
5
1
0
1
FIGURE 3. TWO-BYTE INSTRUCTION SEQUENCE
ISSUE STOP
ISSUE STOP
PROCEED
A3
A2
A1
A0
X9408
A
C
K
I3
The four high order bits define the instruction. The next two
bits (R1 and R0) select one of the four registers that is to be
acted upon when a register oriented instruction is issued.
The last bits (P1, P0) select which one of the four
potentiometers is to be affected by the instruction.
Four of the nine instructions end with the transmission of the
instruction byte. The basic sequence is illustrated in
Figure 3. These two-byte instructions exchange data
between the Wiper Counter Register and one of the Data
Registers. A transfer from a Data Register to a Wiper
Counter Register is essentially a write to a static RAM. The
response of the wiper to this action will be delayed t
transfer from the Wiper Counter Register (current wiper
position), to a data register is a write to nonvolatile memory
and takes a minimum of t
occur between one of the four potentiometers and one of its
associated registers; or it may occur globally, wherein the
transfer occurs between all of the potentiometers and one of
their associated registers.
Four instructions require a three-byte sequence to complete.
These instructions transfer data between the host and the
X9408; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are: Read Wiper Counter Register (read
the current wiper position of the selected pot), Write Wiper
Counter Register (change current wiper position of the
selected pot), Read Data Register (read the contents of the
selected nonvolatile register) and Write Data Register (write
a new value to the selected Data Register). The sequence of
operations is shown in Figure 4.
I2
I1
I3
FIGURE 2. INSTRUCTION BYTE FORMAT
I0
INSTRUCTIONS
I2
R1
I1
R0
P1
WR
I0
P0
to complete. The transfer can
REGISTER
R1
SELECT
A
C
K
R0
REGISTER SELECT
S
T
O
P
WIPER COUNTER
P1
P0
January 15, 2009
WRL
FN8191.4
. A