CAT5140ZI-00-GT3 ON Semiconductor, CAT5140ZI-00-GT3 Datasheet - Page 8

• Manufacturer Part Number: CAT5140ZI-00-GT3
• Description: IC POT DGTL 256TAP I2C/EEP 8MSOP
• Manufacturer: ON Semiconductor

Specifications of CAT5140ZI-00-GT3

• Taps: 256
• Resistance (ohms): 100K
• Number Of Circuits: 1
• Temperature Coefficient: 100 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP
• Resistance In Ohms: 100K
• Number Of Pots: Single
• Taps Per Pot: 256
• Resistance: 100 KOhms
• Wiper Memory: Volatile
• Buffered Wiper: Buffered
• Digital Interface: I2C
• Operating Supply Voltage: 3.3 V
• Supply Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Tolerance: 20 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address 1: Device ID (Read Only)
A writing to address 1 has no effect. Attempts to do so will return an ACK but no data will be written.
Address 0: IVR/WR Register (I/O)
upon the value of bit 7 in Access Control Register (ACR) which is at address 08h, above.
been powered down. Writes to IVR automatically update the WR while writes to WR leave IVR unaffected.
Writing and Reading operations:
memory.
IVR is preprogrammed at the factory to a default value of “80h”.
If the Slave Address Byte sent by the host is different the device will send a NoACK.
I
(A) Write data procedure with designated address.
*Automatically incremented writes are not possible after a non−volatile write.
2
Table 14. I
Read
Write
C Protocol:
Bit 7 defines the DPP device manufacturer; Catalyst/On Semiconductor = high (1)
Address 00h accesses one of two memory registers: the initial value register (IVR) or the wiper register (WR) depending
WR controls the wiper’s position and is a volatile memory while IVR is non−volatile and retains its data after the chip has
WR: Wiper Register = Volatile.
IVR: Initial Value Register = Non−volatile.
All changes to the wiper’s position are immediate. There is no delay the wiper’s movement when writing to non−volatile
1. If Bit 7 from ACR is 0 (non−volatile):
2. If bit 7 from ACR is 1 (volatile):
1. Host transfers the start condition
2. Host transfers the device slave address with the write mode R/W bit (0).
3. Device sends ACK
4. Host transfers the corresponding memory address to the device
5. Device sends ACK
6. Host transfers the write data to the designated address
7. Device sends ACK
8. Routines (6) and (7) are repeated based on the transfer data, and the designated address is automatically incremented*
9. Host transfers the stop condition.
♦
♦
♦
♦
Name
Name
Bit
Bit
A write operation to address 00h will write the same value in WR and IVR.
A read operation to address 00h will output the content of IVR.
A write operation to address 00h will write in WR only.
A read operation to address 00h will output the content of WR.
2
C SLAVE ADDRESS BITS
Transfer Data
7
1
7
−
51h
50h
6
1
6
−
I
2
bit 7
C SERIAL BUS INSTRUCTION FORMAT
0
bit 6
5
0
5
−
1
http://onsemi.com
(See Table 15)
bit 5
0
Slave Address
4
1
4
−
8
bit 4
1
bit 3
0
3
0
3
−
bit 2
0
2
0
2
−
bit 1
0
1
0
1
−
R/W bit
0 (W)
1 (R)
bit 0
0
0
0
−