ADP8861ACPZ-R7 Analog Devices Inc, ADP8861ACPZ-R7 Datasheet - Page 3

• Manufacturer Part Number: ADP8861ACPZ-R7
• Description: Charge Pump Based Backlight Controller
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of ADP8861ACPZ-R7

• Constant Current: -
• Constant Voltage: -
• Topology: Switched Capacitor (Charge Pump)
• Number Of Outputs: 7
• Internal Driver: Yes
• Type - Primary: Backlight, LED Blinker
• Type - Secondary: RGB, White LED
• Frequency: 800kHz ~ 1.32MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Voltage - Output: 4.3 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 20-WFQFN Exposed Pad, CSP
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

SPECIFICATIONS
VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nINT = open, nRST = 2.7 V, V
typical values are at T
otherwise noted.
Table 1.
Parameter
SUPPLY
OSCILLATOR
OUTPUT CURRENT CONTROL
AUTOMATIC GAIN SELECTION
Input Voltage
V
UVLO Noise Filter
Quiescent Current
Switching Frequency
Duty Cycle
Maximum Drive Current
LED Current Source Matching
Leakage Current on LED Pins
Equivalent Output Resistance
Regulated Output Voltage
Minimum Voltage
Minimum Current Sink Headroom
Gain Delay
IN(START)
Operating Range
Start-Up Level
Low Level
Prior to V
During Standby
After Startup and Switching
Diode1 to Diode 7
Diode 7 Only (60 mA Setting)
All Current Sinks
Diode 2 to Diode 7 Current
Gain = 1×
Gain = 1.5×
Gain = 2×
Gain Increases
Voltage
T
T
T
T
Sinks
J
J
J
J
= 25°C
= −40°C to +85°C
= 25°C
= −40°C to +85°C
Hysteresis
IN(START)
A
= 25°C and are not guaranteed, minimum and maximum limits are guaranteed from T
1
Symbol
V
V
V
V
t
I
I
I
I
f
D
I
I
I
I
I
I
R
V
V
V
t
Q
Q(START)
Q(STBY)
Q(ACTIVE)
D1:D7(MAX)
D7(60 mA)
MATCH
MATCH7
MATCH6
D1:D7(LKG)
UVLO
SW
GAIN
OUT
IN
IN(START)
IN(STOP)
IN(HYS)
OUT(REG)
HR(UP)
HR(MIN)
Test Conditions/Comments
V
V
After startup
V
V
V
Charge pump gain = 2×
V
V
V
V
V
V
V
V
V
Decrease V
I
The delay after gain has changed and before
gain is allowed to change again
Bit SCR = 0 in the ISC7 register
DX
IN
IN
IN
IN
IN
D1:D7
D7
D1:D7
D2:D7
IN
IN
IN
IN
IN
= I
increasing
decreasing
= V
= 3.6 V, Bit nSTBY = 0, SCL = SDA = 0 V
= 3.6 V, Bit nSTBY = 1, I
= 5.5 V, V
= 3.6 V, I
= 3.1 V, I
= 2.5 V, I
= 3 V, gain = 2×, I
= 0.4 V, Bit SCR = 1 in the ISC7 register
DX(MAX)
= 0.4 V
= 0.4 V
= 0.4 V
IN(START)
Rev. A | Page 3 of 40
D1:D7
OUT
OUT
OUT
× 95%
D1:D7
− 100 mV
= 100 mA
= 100 mA
= 100 mA
until the gain switches up
= 2.5 V, Bit nSTBY = 1
D1:D7
OUT
= 10 mA
= 0.4 V, Capacitor C1 = 1 μF, Capacitor C2 = 1 μF, C
OUT
= 0 mA, gain = 2×
Min
2.5
1.75
0.8
26.2
24.4
52.5
48.8
4.3
162
A
= −40°C to +85°C, unless
Typ
2.05
1.97
80
10
10
0.3
4.5
1
50
30
60
2.0
1.5
0.5
3.0
3.8
4.9
200
180
100
ADP8861
Max
5.5
2.30
1.0
7.2
1.32
34.1
34.1
67
67
0.5
5.5
276
OUT
= 1 μF,
Unit
V
V
V
mV
μs
μA
μA
mA
MHz
%
mA
mA
mA
mA
%
%
μA
Ω
Ω
Ω
V
mV
mV
μs