X9401WS24 Intersil, X9401WS24 Datasheet - Page 2

• Manufacturer Part Number: X9401WS24
• Description: IC DCP QUAD 10K 64TP 24SOIC
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9401WS24

• Taps: 64
• Resistance (ohms): 10K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 10K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Ordering Information
Pin Descriptions
Host Interface Pins
SERIAL OUTPUT (SO)
SO is a push/pull serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by the
falling edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte addresses
and data to be written to the pots and pot registers are input
on this pin. Data is latched by the rising edge of the serial
clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the
X9401.
CHIP SELECT (CS)
When CS is HIGH, the X9401 is deselected and the SO pin
is at high impedance, and (unless an internal write cycle is
underway) the device will be in the standby state. CS LOW
enables the X9401, placing it in the active power mode. It
should be noted that after a power-up, a HIGH to LOW
transition on CS is required prior to the start of any
operation.
X9401WS24IZ* (Note 1)
X9401WS24I
X9401WS24Z* (Note 1)
X9401WV24IZ* (Note 1)
X9401WV24Z* (Note 1)
X9401WS24I-2.7* (Note 2) X9401WS G
X9401WS24IZ-2.7* (Note)
X9401WS24Z-2.7* (Note 1) X9401WS ZF
X9401WV24-2.7
X9401WV24IZ-2.7* (Note 1) X9401WV ZG
X9401WV24Z-2.7* (Note 1) X9401WV ZF
*Add “T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
2. Not recommended for new designs.
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
NUMBER
PART
X9401WS ZI
X9401WS I
X9401WS ZG
X9401WS Z
X9401WV ZI
X9401WV Z
X9401WV F
MARKING
2
PART
2.7 to 5.5
5 ±10%
LIMITS
V
(V)
CC
POTENTIOMETER
ORGANIZATION
(kΩ)
X9401
10
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD must be brought LOW while
SCK is LOW. To resume communication, HOLD is brought
HIGH, again while SCK is LOW. If the pause feature is not
used, HOLD should be held HIGH at all times.
DEVICE ADDRESS (A
The address inputs are used to set the least significant 2 bits of the
8-bit slave address. A match in the slave address serial data
stream must be made with the address input in order to
initiate communication with the X9401. A maximum of 4
devices may occupy the SPI serial bus.
Potentiometer Pins
V
V
The V
connections on either end of a mechanical potentiometer.
VW (VW0 - VW3)/ RW (RW0 - RW3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the
Wiper Counter Registers.
H
L
(V
(V
L0
H0
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
H
RANGE
/R
TEMP
- V
(°C)
- V
H
L3
H3
and V
)/R
)/ R
L
L
24 Ld SOIC (300 mil) (Pb-free)
24 Ld SOIC (300 mil)
24 Ld SOIC (300 mil)
24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
24 Ld SOIC (300 mil)
24 Ld SOIC (300 mil) (Pb-free)
24 Ld SOIC (300 mil) (Pb-free)
24 Ld TSSOP (4.4mm)
24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
H
(R
/R
(R
L0
L
H0
inputs are equivalent to the terminal
0
- R
- A
- R
L3
PACKAGE
1
)
H3
)
),
October 13, 2009
M24.3
M24.3
M24.3
M24.3
M24.3
M24.3
MDP0044
DWG. #
PKG.
FN8190.4