LTC1446CS8#PBF Linear Technology, LTC1446CS8#PBF Datasheet - Page 8

IC D/A CONV 12BIT R-R DUAL 8SOIC

LTC1446CS8#PBF

Manufacturer Part Number
LTC1446CS8#PBF
Description
IC D/A CONV 12BIT R-R DUAL 8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1446CS8#PBF

Settling Time
14µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
5mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Number Of Channels
2
Resolution
12b
Interface Type
Serial (3-Wire)
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
5LSB
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1446CS8#PBFLTC1446CS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LTC1446CS8#PBF
Manufacturer:
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Quantity:
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LTC1446/LTC1446L
OPERATIO
Serial Interface
The data on the D
on the rising edge of the clock. Data is loaded as one 24-
bit word where the first 12 bits are for DAC A and the
second 12 are for DAC B. For each 12-bit segment the MSB
is loaded first. Data from the shift register is loaded into the
DAC register when CS/LD is pulled high. The clock is
disabled internally when CS/LD is high. Note: CLK must be
low before CS/LD is pulled low to avoid an extra internal
clock pulse.
The buffered output of the 24-bit shift register is available
on the D
Multiple LTC1446/LTC1446L’s may be daisy-chained to-
gether by connecting the D
chip, while the clock and CS/LD signals remain common
to all chips in the daisy chain. The serial data is clocked to
all of the chips, then the CS/LD signal is pulled high to
update all of them simultaneously.
8
OUT
pin which swings from GND to V
IN
U
input is loaded into the shift register
OUT
pin to the D
IN
pin of the next
CC
.
Voltage Output
The LTC1446/LTC1446L include an internal voltage refer-
ence which is connected to each DAC. The LTC1446 has a
full scale of 4.095V making 1LSB equal to 1mV. The
LTC1446L has a full scale of 2.5V making 1LSB equal to
0.61mV.
The LTC1446/LTC1446L rail-to-rail buffered outputs can
source or sink 5mA when operating with a 5V supply while
pulling to within 300mV of the positive supply voltage or
ground. The outputs swing to within a few millivolts of
either supply rail when unloaded and have an equivalent
output resistance of 40 when driving a load to the rails.
The buffer amplifiers can drive 1000pF without going into
oscillation. The output noise spectral density is
600nV/ Hz at 1kHz.

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