MAX5556ESA+ Maxim Integrated Products, MAX5556ESA+ Datasheet - Page 9

• Manufacturer Part Number: MAX5556ESA+
• Description: IC DAC STEREO AUDIO 8-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX5556ESA+

• Number Of Bits: 16
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Dac Outputs: 2
• Resolution: 16 bit
• Interface Type: Serial (3-Wire)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 471 mW
• Minimum Operating Temperature: - 40 C
• Supply Current: 13 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Settling Time: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The MAX5556–MAX5559 strobe serial data (SDATA) in
on the rising edge of SCLK. LRCLK routes data to the
left or right outputs and, along with SCLK, defines the
number of bits per sample transferred. The digital inter-
polators filter data at internal clock rates derived from
the MCLK frequency. Each device supports both inter-
nal and external serial clock (SCLK) modes.
Figure 4. MAX5556 Data Format Timing
Figure 5. MAX5557 Data Format Timing
LRCLK
SDATA
SCLK
LRCLK
SDATA
SCLK
MSB
MSB
-1
-1
_______________________________________________________________________________________
-2
-2
-3
Clock and Data Interface
-3
-4 -5
• LEFT-JUSTIFIED, UP TO 24 BITS OF DATA
• INTERNAL SCLK = 64 x f
• INTERNAL SCLK = 48 x f
-4 -5
• I
• I
32 x f
SCLK = 48 X f
2
2
S, 16-BIT DATA AND INTERNAL SCLK =
S, UP TO 24 BITS OF DATA AND INTERNAL
INTERNAL SERIAL CLOCK MODE
S
IF MCLK/ LRCLK = 256 OR 512
+5
INTERNAL SERIAL CLOCK MODE
+5
+4
S
+4
IF MCLK/ LRCLK = 384
+3
+3
S
S
DATA DIRECTED TO OUTL
DATA DIRECTED TO OUTL
IF MCLK / LRCLK = 256 OR 512
IF MCLK / LRCLK = 384
+2
+2
+1
+1
LSB
LSB
Low-Cost Stereo Audio DACs
• I
• DATA VALID ON RISING EDGE OF SCLK
2
S, UP TO 24 BITS OF DATA
EXTERNAL SERIAL CLOCK MODE
• LEFT-JUSTIFIED, UP TO 24 BITS OF DATA
• DATA VALID ON RISING EDGE OF SCLK
The serial interface strobes data (SDATA) in on the ris-
ing edge of SCLK, MSB first. The MAX5556–MAX5559
support four different data formats, as detailed in
Figures 4–7.
EXTERNAL SERIAL CLOCK MODE
MSB
MSB
-1
-1
-2
-2
-3 -4
-3 -4
+5
+5
+4
+4
+3
+3
DATA DIRECTED TO OUTR
+2
DATA DIRECTED TO OUTR
+2
+1
+1
LSB
LSB
SDATA Input
9