MAX500BCWE+ Maxim Integrated Products, MAX500BCWE+ Datasheet - Page 9
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MAX500BCWE+
Manufacturer Part Number
MAX500BCWE+
Description
IC DAC CMOS QUAD SRL 8BIT 16SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX500BCPE.pdf
(12 pages)
Specifications of MAX500BCWE+
Settling Time
2.5µs
Number Of Bits
8
Data Interface
Serial
Number Of Converters
4
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Number Of Dac Outputs
4
Resolution
8 bit
Interface Type
Serial (I2C)
Supply Voltage (max)
16.5 V
Supply Voltage (min)
11.4 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
0 C
Supply Current
10 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The SRO output swings from V
to other MAX500s poses no problem. If SRO is used to
drive a TTL-compatible input, use a clamp diode
between TTL +5V and V
resistor to prevent potential latchup problems with
the 5V supply.
Table 2 shows the truth table for SDA, SCL, LOAD, and
LDAC operation. Figures 5 and 6 show the timing dia-
grams for the MAX500.
The MAX500 is fully specified to operate with V
between +12V ±5% and +15V ±10% (+11.4V to
+16.5V), and with V
mance is also guaranteed for single-supply operation
(V
V
For an adequate DAC and buffer operating range, the
V
The MAX500 is specified to operate with a reference
input range of +2V to V
Digital or AC transient signals between AGND and
DGND will create noise at the analog outputs. It is rec-
ommended that AGND and DGND be tied together at
the DAC and that this point be tied to the highest quali-
ty ground available. If separate ground buses are used,
then two clamp diodes (1N914 or equivalent) should be
connected between AGND and DGND to keep the two
Figure 7. Suggested MAX500 PC Board Layout for
Minimizing Crosstalk
V
__________Applications Information
SS
REF
REF
V
V
SS
OUT
OUT
V
A/B
SS
is -5V (see Output Buffer Amplifiers section).
B
A
= 0V), however, zero-code error is reduced when
voltage must always be at least 4V below V
DGND
AGND
COMPONENT SIDE (TOP VIEW)
_______________________________________________________________________________________
Power-Supply and Reference
SS
DD
SYSTEM GND
from 0V to -5.5V. 8-bit perfor-
DD
- 4V.
Ground Management
and the current-limiting
DD
Operating Ranges
to DGND. Cascading
CMOS, Quad, Serial-Interface
V
V
V
V
V
OUT
OUT
DD
REF
REF
DD
C
D
C
D
DD
.
ground buses within one diode drop of each other. To
avoid parasitic device turn-on, AGND must not be
allowed to be more negative than DGND. DGND should
be used as supply ground for bypassing purposes.
Figure 8. MAX500 Unipolar Output Circuit
Figure 9. Bipolar Output Circuit
V
DAC
OUTPUT
FROM MAX500
NOTE: V
DIGITAL
INPUTS
SHOWN
REF
NOT
MAX500
REF
IS THE REFERENCE INPUT FOR THE MAX500
V
R1
REF
A/B
4
REFERENCE INPUTS
-5V (OR GND)
V
DAC D
DAC B
DAC C
REF
DAC A
V
12
SS
C
3
V
REF
13
D
R1 = R2 = 10k ±0.1%
AGND
R2
+15V
-15V
5
8-Bit DAC
14
+15V
V
DD
DGND
6
2
1
16
15
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
A
B
C
D
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