CS4340-CZZ Cirrus Logic Inc, CS4340-CZZ Datasheet - Page 16

IC DAC 24BIT 96KHZ 101DB 16TSSOP

CS4340-CZZ

Manufacturer Part Number
CS4340-CZZ
Description
IC DAC 24BIT 96KHZ 101DB 16TSSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS4340-CZZ

Data Interface
Serial
Number Of Bits
24
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
90mW
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resolution (bits)
24bit
Sampling Rate
96kSPS
Input Channel Type
Serial
Supply Current
15mA
Digital Ic Case Style
TSSOP
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CDB4340A - EVALUATION BOARD FOR CS4340A
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1049-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS4340-CZZ
Manufacturer:
CIRRUS
Quantity:
20 000
4. APPLICATIONS
4.1
The device operates in one of two operational modes determined by the Master Clock to Left/Right Clock ratio (see
section 4.2). Sample rates outside the specified range for each mode are not supported.
4.2
The device requires external generation of the master (MCLK) and left/right (LRCK) clocks. The device also requires
external generation of the serial clock (SCLK) if the internal serial clock is not used. The LRCK, defined also as the
input sample rate Fs, must be synchronously derived from MCLK according to specified ratios. The specified ratios
of MCLK to LRCK, along with several standard audio sample rates and the required MCLK frequency, are illustrated
in Tables 2 and 3.
4.2.1 Internal Serial Clock Mode
16
The device will enter the Internal Serial Clock Mode if no low to high transitions are detected on the SCLK pin
for 2 consecutive periods of LRCK. In this mode, the SCLK is internally derived and synchronous with MCLK
and LRCK. The SCLK/LRCK ratio is either 32, 48, or 64 depending upon the MCLK/LRCK ratio and the Digital
Interface Format selection (see Table 4).
Sample Rate Range/Operational Mode
System Clocking
4 kHz - 50 kHz
50 kHz - 100 kHz
Input Sample Rate (Fs)
Sample Rate
(kHz)
Sample Rate
44.1
Table 3. Double-Speed Mode Standard Frequencies
Table 2. Single-Speed Mode Standard Frequencies
32
48
(kHz)
88.2
64
96
Table 1. CS4340 Speed Modes
12.2880
11.2896
8.1920
256x
12.2880
11.2896
8.1920
128x
Single-Speed Mode
Double-Speed Mode
MCLK (MHz)
MCLK (MHz)
12.2880
16.9344
18.4320
384x
MODE
12.2880
16.9344
18.4320
192x
16.3840
22.5792
24.5760
512x
CS4340
DS297F3

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